1*4882a593Smuzhiyun* Device tree bindings for Texas instruments Keystone timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis document provides bindings for the 64-bit timer in the KeyStone 4*4882a593Smuzhiyunarchitecture devices. The timer can be configured as a general-purpose 64-bit 5*4882a593Smuzhiyuntimer, dual general-purpose 32-bit timers. When configured as dual 32-bit 6*4882a593Smuzhiyuntimers, each half can operate in conjunction (chain mode) or independently 7*4882a593Smuzhiyun(unchained mode) of each other. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunIt is global timer is a free running up-counter and can generate interrupt 10*4882a593Smuzhiyunwhen the counter reaches preset counter values. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunDocumentation: 13*4882a593Smuzhiyunhttps://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunRequired properties: 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- compatible : should be "ti,keystone-timer". 18*4882a593Smuzhiyun- reg : specifies base physical address and count of the registers. 19*4882a593Smuzhiyun- interrupts : interrupt generated by the timer. 20*4882a593Smuzhiyun- clocks : the clock feeding the timer clock. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunExample: 23*4882a593Smuzhiyun 24*4882a593Smuzhiyuntimer@22f0000 { 25*4882a593Smuzhiyun compatible = "ti,keystone-timer"; 26*4882a593Smuzhiyun reg = <0x022f0000 0x80>; 27*4882a593Smuzhiyun interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; 28*4882a593Smuzhiyun clocks = <&clktimer15>; 29*4882a593Smuzhiyun}; 30