xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Device tree bindings for Texas Instruments DaVinci timer
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis document provides bindings for the 64-bit timer in the DaVinci
4*4882a593Smuzhiyunarchitecture devices. The timer can be configured as a general-purpose 64-bit
5*4882a593Smuzhiyuntimer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6*4882a593Smuzhiyuntimers, each half can operate in conjunction (chain mode) or independently
7*4882a593Smuzhiyun(unchained mode) of each other.
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunThe timer is a free running up-counter and can generate interrupts when the
10*4882a593Smuzhiyuncounter reaches preset counter values.
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunAlso see ../watchdog/davinci-wdt.txt for timers that are configurable as
13*4882a593Smuzhiyunwatchdog timers.
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunRequired properties:
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun- compatible : should be "ti,da830-timer".
18*4882a593Smuzhiyun- reg : specifies base physical address and count of the registers.
19*4882a593Smuzhiyun- interrupts : interrupts generated by the timer.
20*4882a593Smuzhiyun- interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1",
21*4882a593Smuzhiyun		   "cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6",
22*4882a593Smuzhiyun		   "cmpint7" ("cmpintX" may be omitted if not present in the
23*4882a593Smuzhiyun		   hardware).
24*4882a593Smuzhiyun- clocks : the clock feeding the timer clock.
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunExample:
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	clocksource: timer@20000 {
29*4882a593Smuzhiyun		compatible = "ti,da830-timer";
30*4882a593Smuzhiyun		reg = <0x20000 0x1000>;
31*4882a593Smuzhiyun		interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>,
32*4882a593Smuzhiyun			     <80>, <81>;
33*4882a593Smuzhiyun		interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1",
34*4882a593Smuzhiyun				  "cmpint2", "cmpint3", "cmpint4", "cmpint5",
35*4882a593Smuzhiyun				  "cmpint6", "cmpint7";
36*4882a593Smuzhiyun		clocks = <&pll0_auxclk>;
37*4882a593Smuzhiyun	};
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