1*4882a593SmuzhiyunOMAP Timer bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be set to one of the below. Please note that 5*4882a593Smuzhiyun OMAP44xx devices have timer instances that are 100% 6*4882a593Smuzhiyun register compatible with OMAP3xxx devices as well as 7*4882a593Smuzhiyun newer timers that are not 100% register compatible. 8*4882a593Smuzhiyun So for OMAP44xx devices timer instances may use 9*4882a593Smuzhiyun different compatible strings. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun ti,omap2420-timer (applicable to OMAP24xx devices) 12*4882a593Smuzhiyun ti,omap3430-timer (applicable to OMAP3xxx/44xx devices) 13*4882a593Smuzhiyun ti,omap4430-timer (applicable to OMAP44xx devices) 14*4882a593Smuzhiyun ti,omap5430-timer (applicable to OMAP543x devices) 15*4882a593Smuzhiyun ti,am335x-timer (applicable to AM335x devices) 16*4882a593Smuzhiyun ti,am335x-timer-1ms (applicable to AM335x devices) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- reg: Contains timer register address range (base address and 19*4882a593Smuzhiyun length). 20*4882a593Smuzhiyun- interrupts: Contains the interrupt information for the timer. The 21*4882a593Smuzhiyun format is being dependent on which interrupt controller 22*4882a593Smuzhiyun the OMAP device uses. 23*4882a593Smuzhiyun- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>", 24*4882a593Smuzhiyun where <X> is the instance number of the timer from the 25*4882a593Smuzhiyun HW spec. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunOptional properties: 28*4882a593Smuzhiyun- ti,timer-alwon: Indicates the timer is in an alway-on power domain. 29*4882a593Smuzhiyun- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in 30*4882a593Smuzhiyun addition to the ARM CPU. 31*4882a593Smuzhiyun- ti,timer-pwm: Indicates the timer can generate a PWM output. 32*4882a593Smuzhiyun- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device 33*4882a593Smuzhiyun and therefore cannot be used by the kernel. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample: 36*4882a593Smuzhiyun 37*4882a593Smuzhiyuntimer12: timer@48304000 { 38*4882a593Smuzhiyun compatible = "ti,omap3430-timer"; 39*4882a593Smuzhiyun reg = <0x48304000 0x400>; 40*4882a593Smuzhiyun interrupts = <95>; 41*4882a593Smuzhiyun ti,hwmods = "timer12" 42*4882a593Smuzhiyun ti,timer-alwon; 43*4882a593Smuzhiyun ti,timer-secure; 44*4882a593Smuzhiyun}; 45