1*4882a593SmuzhiyunRockchip rk timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be: 5*4882a593Smuzhiyun "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108 6*4882a593Smuzhiyun "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036 7*4882a593Smuzhiyun "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066 8*4882a593Smuzhiyun "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188 9*4882a593Smuzhiyun "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228 10*4882a593Smuzhiyun "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229 11*4882a593Smuzhiyun "rockchip,rk3288-timer": for Rockchip RK3288 12*4882a593Smuzhiyun "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368 13*4882a593Smuzhiyun "rockchip,rk3399-timer": for Rockchip RK3399 14*4882a593Smuzhiyun- reg: base address of the timer register starting with TIMERS CONTROL register 15*4882a593Smuzhiyun- interrupts: should contain the interrupts for Timer0 16*4882a593Smuzhiyun- clocks : must contain an entry for each entry in clock-names 17*4882a593Smuzhiyun- clock-names : must include the following entries: 18*4882a593Smuzhiyun "timer", "pclk" 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun timer: timer@ff810000 { 22*4882a593Smuzhiyun compatible = "rockchip,rk3288-timer"; 23*4882a593Smuzhiyun reg = <0xff810000 0x20>; 24*4882a593Smuzhiyun interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 25*4882a593Smuzhiyun clocks = <&xin24m>, <&cru PCLK_TIMER>; 26*4882a593Smuzhiyun clock-names = "timer", "pclk"; 27*4882a593Smuzhiyun }; 28