1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/timer/renesas,cmt.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas Compare Match Timer (CMT) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: 14*4882a593Smuzhiyun The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock 15*4882a593Smuzhiyun inputs and programmable compare match. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun Channels share hardware resources but their counter and compare match values 18*4882a593Smuzhiyun are independent. A particular CMT instance can implement only a subset of the 19*4882a593Smuzhiyun channels supported by the CMT model. Channel indices represent the hardware 20*4882a593Smuzhiyun position of the channel in the CMT and don't match the channel numbers in the 21*4882a593Smuzhiyun datasheets. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun oneOf: 26*4882a593Smuzhiyun - items: 27*4882a593Smuzhiyun - enum: 28*4882a593Smuzhiyun - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1 29*4882a593Smuzhiyun - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1 30*4882a593Smuzhiyun - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1 31*4882a593Smuzhiyun - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1 32*4882a593Smuzhiyun - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1 33*4882a593Smuzhiyun - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5 34*4882a593Smuzhiyun - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5 35*4882a593Smuzhiyun - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5 36*4882a593Smuzhiyun - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5 37*4882a593Smuzhiyun - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun - items: 40*4882a593Smuzhiyun - enum: 41*4882a593Smuzhiyun - renesas,r8a73a4-cmt0 # 32-bit CMT0 on R-Mobile APE6 42*4882a593Smuzhiyun - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H 43*4882a593Smuzhiyun - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M 44*4882a593Smuzhiyun - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N 45*4882a593Smuzhiyun - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E 46*4882a593Smuzhiyun - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C 47*4882a593Smuzhiyun - renesas,r8a7790-cmt0 # 32-bit CMT0 on R-Car H2 48*4882a593Smuzhiyun - renesas,r8a7791-cmt0 # 32-bit CMT0 on R-Car M2-W 49*4882a593Smuzhiyun - renesas,r8a7792-cmt0 # 32-bit CMT0 on R-Car V2H 50*4882a593Smuzhiyun - renesas,r8a7793-cmt0 # 32-bit CMT0 on R-Car M2-N 51*4882a593Smuzhiyun - renesas,r8a7794-cmt0 # 32-bit CMT0 on R-Car E2 52*4882a593Smuzhiyun - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun - items: 55*4882a593Smuzhiyun - enum: 56*4882a593Smuzhiyun - renesas,r8a73a4-cmt1 # 48-bit CMT1 on R-Mobile APE6 57*4882a593Smuzhiyun - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H 58*4882a593Smuzhiyun - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M 59*4882a593Smuzhiyun - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N 60*4882a593Smuzhiyun - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E 61*4882a593Smuzhiyun - renesas,r8a77470-cmt1 # 48-bit CMT1 on RZ/G1C 62*4882a593Smuzhiyun - renesas,r8a7790-cmt1 # 48-bit CMT1 on R-Car H2 63*4882a593Smuzhiyun - renesas,r8a7791-cmt1 # 48-bit CMT1 on R-Car M2-W 64*4882a593Smuzhiyun - renesas,r8a7792-cmt1 # 48-bit CMT1 on R-Car V2H 65*4882a593Smuzhiyun - renesas,r8a7793-cmt1 # 48-bit CMT1 on R-Car M2-N 66*4882a593Smuzhiyun - renesas,r8a7794-cmt1 # 48-bit CMT1 on R-Car E2 67*4882a593Smuzhiyun - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun - items: 70*4882a593Smuzhiyun - enum: 71*4882a593Smuzhiyun - renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M 72*4882a593Smuzhiyun - renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N 73*4882a593Smuzhiyun - renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E 74*4882a593Smuzhiyun - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H 75*4882a593Smuzhiyun - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 76*4882a593Smuzhiyun - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W 77*4882a593Smuzhiyun - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N 78*4882a593Smuzhiyun - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M 79*4882a593Smuzhiyun - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H 80*4882a593Smuzhiyun - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3 81*4882a593Smuzhiyun - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3 82*4882a593Smuzhiyun - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun - items: 85*4882a593Smuzhiyun - enum: 86*4882a593Smuzhiyun - renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M 87*4882a593Smuzhiyun - renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N 88*4882a593Smuzhiyun - renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E 89*4882a593Smuzhiyun - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H 90*4882a593Smuzhiyun - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 91*4882a593Smuzhiyun - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W 92*4882a593Smuzhiyun - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N 93*4882a593Smuzhiyun - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M 94*4882a593Smuzhiyun - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H 95*4882a593Smuzhiyun - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3 96*4882a593Smuzhiyun - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3 97*4882a593Smuzhiyun - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun reg: 100*4882a593Smuzhiyun maxItems: 1 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun interrupts: 103*4882a593Smuzhiyun minItems: 1 104*4882a593Smuzhiyun maxItems: 8 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun clocks: 107*4882a593Smuzhiyun maxItems: 1 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun clock-names: 110*4882a593Smuzhiyun const: fck 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun power-domains: 113*4882a593Smuzhiyun maxItems: 1 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun resets: 116*4882a593Smuzhiyun maxItems: 1 117*4882a593Smuzhiyun 118*4882a593Smuzhiyunrequired: 119*4882a593Smuzhiyun - compatible 120*4882a593Smuzhiyun - reg 121*4882a593Smuzhiyun - interrupts 122*4882a593Smuzhiyun - clocks 123*4882a593Smuzhiyun - clock-names 124*4882a593Smuzhiyun - power-domains 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunallOf: 127*4882a593Smuzhiyun - if: 128*4882a593Smuzhiyun properties: 129*4882a593Smuzhiyun compatible: 130*4882a593Smuzhiyun contains: 131*4882a593Smuzhiyun enum: 132*4882a593Smuzhiyun - renesas,rcar-gen2-cmt0 133*4882a593Smuzhiyun - renesas,rcar-gen3-cmt0 134*4882a593Smuzhiyun then: 135*4882a593Smuzhiyun properties: 136*4882a593Smuzhiyun interrupts: 137*4882a593Smuzhiyun minItems: 2 138*4882a593Smuzhiyun maxItems: 2 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun - if: 141*4882a593Smuzhiyun properties: 142*4882a593Smuzhiyun compatible: 143*4882a593Smuzhiyun contains: 144*4882a593Smuzhiyun enum: 145*4882a593Smuzhiyun - renesas,rcar-gen2-cmt1 146*4882a593Smuzhiyun - renesas,rcar-gen3-cmt1 147*4882a593Smuzhiyun then: 148*4882a593Smuzhiyun properties: 149*4882a593Smuzhiyun interrupts: 150*4882a593Smuzhiyun minItems: 8 151*4882a593Smuzhiyun maxItems: 8 152*4882a593Smuzhiyun 153*4882a593SmuzhiyunadditionalProperties: false 154*4882a593Smuzhiyun 155*4882a593Smuzhiyunexamples: 156*4882a593Smuzhiyun - | 157*4882a593Smuzhiyun #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 158*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 159*4882a593Smuzhiyun #include <dt-bindings/power/r8a7790-sysc.h> 160*4882a593Smuzhiyun cmt0: timer@ffca0000 { 161*4882a593Smuzhiyun compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0"; 162*4882a593Smuzhiyun reg = <0xffca0000 0x1004>; 163*4882a593Smuzhiyun interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 164*4882a593Smuzhiyun <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 165*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 124>; 166*4882a593Smuzhiyun clock-names = "fck"; 167*4882a593Smuzhiyun power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 168*4882a593Smuzhiyun resets = <&cpg 124>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun cmt1: timer@e6130000 { 172*4882a593Smuzhiyun compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1"; 173*4882a593Smuzhiyun reg = <0xe6130000 0x1004>; 174*4882a593Smuzhiyun interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 175*4882a593Smuzhiyun <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 176*4882a593Smuzhiyun <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 177*4882a593Smuzhiyun <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 178*4882a593Smuzhiyun <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 179*4882a593Smuzhiyun <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 180*4882a593Smuzhiyun <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 181*4882a593Smuzhiyun <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 182*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 329>; 183*4882a593Smuzhiyun clock-names = "fck"; 184*4882a593Smuzhiyun power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 185*4882a593Smuzhiyun resets = <&cpg 329>; 186*4882a593Smuzhiyun }; 187