1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/timer/renesas,mtu2.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Renesas Multi-Function Timer Pulse Unit 2 (MTU2) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Geert Uytterhoeven <geert+renesas@glider.be> 11*4882a593Smuzhiyun - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: 14*4882a593Smuzhiyun The MTU2 is a multi-purpose, multi-channel timer/counter with configurable clock inputs 15*4882a593Smuzhiyun and programmable compare match. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun Channels share hardware resources but their counter and compare match value are 18*4882a593Smuzhiyun independent. The MTU2 hardware supports five channels indexed from 0 to 4. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunproperties: 21*4882a593Smuzhiyun compatible: 22*4882a593Smuzhiyun items: 23*4882a593Smuzhiyun - enum: 24*4882a593Smuzhiyun - renesas,mtu2-r7s72100 # RZ/A1H 25*4882a593Smuzhiyun - const: renesas,mtu2 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun reg: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun interrupts: 31*4882a593Smuzhiyun minItems: 1 32*4882a593Smuzhiyun maxItems: 5 33*4882a593Smuzhiyun description: One entry for each enabled channel. 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun interrupt-names: 36*4882a593Smuzhiyun minItems: 1 37*4882a593Smuzhiyun items: 38*4882a593Smuzhiyun - const: tgi0a 39*4882a593Smuzhiyun - const: tgi1a 40*4882a593Smuzhiyun - const: tgi2a 41*4882a593Smuzhiyun - const: tgi3a 42*4882a593Smuzhiyun - const: tgi4a 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun clocks: 45*4882a593Smuzhiyun maxItems: 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun clock-names: 48*4882a593Smuzhiyun const: fck 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun power-domains: 51*4882a593Smuzhiyun maxItems: 1 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunrequired: 54*4882a593Smuzhiyun - compatible 55*4882a593Smuzhiyun - reg 56*4882a593Smuzhiyun - interrupts 57*4882a593Smuzhiyun - interrupt-names 58*4882a593Smuzhiyun - clocks 59*4882a593Smuzhiyun - clock-names 60*4882a593Smuzhiyun - power-domains 61*4882a593Smuzhiyun 62*4882a593SmuzhiyunadditionalProperties: false 63*4882a593Smuzhiyun 64*4882a593Smuzhiyunexamples: 65*4882a593Smuzhiyun - | 66*4882a593Smuzhiyun #include <dt-bindings/clock/r7s72100-clock.h> 67*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 68*4882a593Smuzhiyun mtu2: timer@fcff0000 { 69*4882a593Smuzhiyun compatible = "renesas,mtu2-r7s72100", "renesas,mtu2"; 70*4882a593Smuzhiyun reg = <0xfcff0000 0x400>; 71*4882a593Smuzhiyun interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 72*4882a593Smuzhiyun interrupt-names = "tgi0a"; 73*4882a593Smuzhiyun clocks = <&mstp3_clks R7S72100_CLK_MTU2>; 74*4882a593Smuzhiyun clock-names = "fck"; 75*4882a593Smuzhiyun power-domains = <&cpg_clocks>; 76*4882a593Smuzhiyun }; 77