1*4882a593Smuzhiyun* MSM Timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunProperties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible : Should at least contain "qcom,msm-timer". More specific 6*4882a593Smuzhiyun properties specify which subsystem the timers are paired with. 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun "qcom,kpss-timer" - krait subsystem 9*4882a593Smuzhiyun "qcom,scss-timer" - scorpion subsystem 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- interrupts : Interrupts for the debug timer, the first general purpose 12*4882a593Smuzhiyun timer, and optionally a second general purpose timer, and 13*4882a593Smuzhiyun optionally as well, 2 watchdog interrupts, in that order. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- reg : Specifies the base address of the timer registers. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- clocks: Reference to the parent clocks, one per output clock. The parents 18*4882a593Smuzhiyun must appear in the same order as the clock names. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- clock-names: The name of the clocks as free-form strings. They should be in 21*4882a593Smuzhiyun the same order as the clocks. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun- clock-frequency : The frequency of the debug timer and the general purpose 24*4882a593Smuzhiyun timer(s) in Hz in that order. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunOptional: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun- cpu-offset : per-cpu offset used when the timer is accessed without the 29*4882a593Smuzhiyun CPU remapping facilities. The offset is 30*4882a593Smuzhiyun cpu-offset + (0x10000 * cpu-nr). 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunExample: 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun timer@200a000 { 35*4882a593Smuzhiyun compatible = "qcom,scss-timer", "qcom,msm-timer"; 36*4882a593Smuzhiyun interrupts = <1 1 0x301>, 37*4882a593Smuzhiyun <1 2 0x301>, 38*4882a593Smuzhiyun <1 3 0x301>, 39*4882a593Smuzhiyun <1 4 0x301>, 40*4882a593Smuzhiyun <1 5 0x301>; 41*4882a593Smuzhiyun reg = <0x0200a000 0x100>; 42*4882a593Smuzhiyun clock-frequency = <19200000>, 43*4882a593Smuzhiyun <32768>; 44*4882a593Smuzhiyun clocks = <&sleep_clk>; 45*4882a593Smuzhiyun clock-names = "sleep"; 46*4882a593Smuzhiyun cpu-offset = <0x40000>; 47*4882a593Smuzhiyun }; 48