1*4882a593SmuzhiyunMarvell Orion SoC timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: shall be "marvell,orion-timer" 5*4882a593Smuzhiyun- reg: base address of the timer register starting with TIMERS CONTROL register 6*4882a593Smuzhiyun- interrupts: should contain the interrupts for Timer0 and Timer1 7*4882a593Smuzhiyun- clocks: phandle of timer reference clock (tclk) 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunExample: 10*4882a593Smuzhiyun timer: timer { 11*4882a593Smuzhiyun compatible = "marvell,orion-timer"; 12*4882a593Smuzhiyun reg = <0x20300 0x20>; 13*4882a593Smuzhiyun interrupt-parent = <&bridge_intc>; 14*4882a593Smuzhiyun interrupts = <1>, <2>; 15*4882a593Smuzhiyun clocks = <&core_clk 0>; 16*4882a593Smuzhiyun }; 17