1*4882a593SmuzhiyunTI-NSPIRE timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible : should be "lsi,zevio-timer". 6*4882a593Smuzhiyun- reg : The physical base address and size of the timer (always first). 7*4882a593Smuzhiyun- clocks: phandle to the source clock. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunOptional properties: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- interrupts : The interrupt number of the first timer. 12*4882a593Smuzhiyun- reg : The interrupt acknowledgement registers 13*4882a593Smuzhiyun (always after timer base address) 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunIf any of the optional properties are not given, the timer is added as a 16*4882a593Smuzhiyunclock-source only. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyuntimer { 21*4882a593Smuzhiyun compatible = "lsi,zevio-timer"; 22*4882a593Smuzhiyun reg = <0x900D0000 0x1000>, <0x900A0020 0x8>; 23*4882a593Smuzhiyun interrupts = <19>; 24*4882a593Smuzhiyun clocks = <&timer_clk>; 25*4882a593Smuzhiyun}; 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunExample (no clock-events): 28*4882a593Smuzhiyun 29*4882a593Smuzhiyuntimer { 30*4882a593Smuzhiyun compatible = "lsi,zevio-timer"; 31*4882a593Smuzhiyun reg = <0x900D0000 0x1000>; 32*4882a593Smuzhiyun clocks = <&timer_clk>; 33*4882a593Smuzhiyun}; 34