1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/timer/ingenic,tcu.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Ingenic SoCs Timer/Counter Unit (TCU) devicetree bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: | 10*4882a593Smuzhiyun For a description of the TCU hardware and drivers, have a look at 11*4882a593Smuzhiyun Documentation/mips/ingenic-tcu.rst. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunmaintainers: 14*4882a593Smuzhiyun - Paul Cercueil <paul@crapouillou.net> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunselect: 17*4882a593Smuzhiyun properties: 18*4882a593Smuzhiyun compatible: 19*4882a593Smuzhiyun contains: 20*4882a593Smuzhiyun enum: 21*4882a593Smuzhiyun - ingenic,jz4740-tcu 22*4882a593Smuzhiyun - ingenic,jz4725b-tcu 23*4882a593Smuzhiyun - ingenic,jz4770-tcu 24*4882a593Smuzhiyun - ingenic,jz4780-tcu 25*4882a593Smuzhiyun - ingenic,x1000-tcu 26*4882a593Smuzhiyun required: 27*4882a593Smuzhiyun - compatible 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunproperties: 30*4882a593Smuzhiyun $nodename: 31*4882a593Smuzhiyun pattern: "^timer@[0-9a-f]+$" 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun "#address-cells": 34*4882a593Smuzhiyun const: 1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun "#size-cells": 37*4882a593Smuzhiyun const: 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun "#clock-cells": 40*4882a593Smuzhiyun const: 1 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun "#interrupt-cells": 43*4882a593Smuzhiyun const: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun interrupt-controller: true 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun ranges: true 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun compatible: 50*4882a593Smuzhiyun oneOf: 51*4882a593Smuzhiyun - items: 52*4882a593Smuzhiyun - enum: 53*4882a593Smuzhiyun - ingenic,jz4740-tcu 54*4882a593Smuzhiyun - ingenic,jz4725b-tcu 55*4882a593Smuzhiyun - ingenic,jz4770-tcu 56*4882a593Smuzhiyun - ingenic,x1000-tcu 57*4882a593Smuzhiyun - const: simple-mfd 58*4882a593Smuzhiyun - items: 59*4882a593Smuzhiyun - const: ingenic,jz4780-tcu 60*4882a593Smuzhiyun - const: ingenic,jz4770-tcu 61*4882a593Smuzhiyun - const: simple-mfd 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun reg: 64*4882a593Smuzhiyun maxItems: 1 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun clocks: 67*4882a593Smuzhiyun items: 68*4882a593Smuzhiyun - description: RTC clock 69*4882a593Smuzhiyun - description: EXT clock 70*4882a593Smuzhiyun - description: PCLK clock 71*4882a593Smuzhiyun - description: TCU clock 72*4882a593Smuzhiyun minItems: 3 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun clock-names: 75*4882a593Smuzhiyun items: 76*4882a593Smuzhiyun - const: rtc 77*4882a593Smuzhiyun - const: ext 78*4882a593Smuzhiyun - const: pclk 79*4882a593Smuzhiyun - const: tcu 80*4882a593Smuzhiyun minItems: 3 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun interrupts: 83*4882a593Smuzhiyun items: 84*4882a593Smuzhiyun - description: TCU0 interrupt 85*4882a593Smuzhiyun - description: TCU1 interrupt 86*4882a593Smuzhiyun - description: TCU2 interrupt 87*4882a593Smuzhiyun minItems: 1 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun assigned-clocks: 90*4882a593Smuzhiyun minItems: 1 91*4882a593Smuzhiyun maxItems: 8 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun assigned-clock-parents: 94*4882a593Smuzhiyun minItems: 1 95*4882a593Smuzhiyun maxItems: 8 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun assigned-clock-rates: 98*4882a593Smuzhiyun minItems: 1 99*4882a593Smuzhiyun maxItems: 8 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun ingenic,pwm-channels-mask: 102*4882a593Smuzhiyun description: Bitmask of TCU channels reserved for PWM use. 103*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 104*4882a593Smuzhiyun minimum: 0x00 105*4882a593Smuzhiyun maximum: 0xff 106*4882a593Smuzhiyun default: 0xfc 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunpatternProperties: 109*4882a593Smuzhiyun "^watchdog@[a-f0-9]+$": 110*4882a593Smuzhiyun type: object 111*4882a593Smuzhiyun $ref: ../watchdog/watchdog.yaml# 112*4882a593Smuzhiyun properties: 113*4882a593Smuzhiyun compatible: 114*4882a593Smuzhiyun oneOf: 115*4882a593Smuzhiyun - enum: 116*4882a593Smuzhiyun - ingenic,jz4740-watchdog 117*4882a593Smuzhiyun - ingenic,jz4780-watchdog 118*4882a593Smuzhiyun - items: 119*4882a593Smuzhiyun - enum: 120*4882a593Smuzhiyun - ingenic,jz4770-watchdog 121*4882a593Smuzhiyun - ingenic,jz4725b-watchdog 122*4882a593Smuzhiyun - const: ingenic,jz4740-watchdog 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun reg: 125*4882a593Smuzhiyun maxItems: 1 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun clocks: 128*4882a593Smuzhiyun maxItems: 1 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun clock-names: 131*4882a593Smuzhiyun const: wdt 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun required: 134*4882a593Smuzhiyun - compatible 135*4882a593Smuzhiyun - reg 136*4882a593Smuzhiyun - clocks 137*4882a593Smuzhiyun - clock-names 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun "^pwm@[a-f0-9]+$": 140*4882a593Smuzhiyun type: object 141*4882a593Smuzhiyun $ref: ../pwm/pwm.yaml# 142*4882a593Smuzhiyun properties: 143*4882a593Smuzhiyun compatible: 144*4882a593Smuzhiyun oneOf: 145*4882a593Smuzhiyun - enum: 146*4882a593Smuzhiyun - ingenic,jz4740-pwm 147*4882a593Smuzhiyun - ingenic,jz4725b-pwm 148*4882a593Smuzhiyun - items: 149*4882a593Smuzhiyun - enum: 150*4882a593Smuzhiyun - ingenic,jz4770-pwm 151*4882a593Smuzhiyun - ingenic,jz4780-pwm 152*4882a593Smuzhiyun - const: ingenic,jz4740-pwm 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun reg: 155*4882a593Smuzhiyun maxItems: 1 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun clocks: 158*4882a593Smuzhiyun minItems: 6 159*4882a593Smuzhiyun maxItems: 8 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun clock-names: 162*4882a593Smuzhiyun items: 163*4882a593Smuzhiyun - const: timer0 164*4882a593Smuzhiyun - const: timer1 165*4882a593Smuzhiyun - const: timer2 166*4882a593Smuzhiyun - const: timer3 167*4882a593Smuzhiyun - const: timer4 168*4882a593Smuzhiyun - const: timer5 169*4882a593Smuzhiyun - const: timer6 170*4882a593Smuzhiyun - const: timer7 171*4882a593Smuzhiyun minItems: 6 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun required: 174*4882a593Smuzhiyun - compatible 175*4882a593Smuzhiyun - reg 176*4882a593Smuzhiyun - clocks 177*4882a593Smuzhiyun - clock-names 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun "^timer@[a-f0-9]+$": 180*4882a593Smuzhiyun type: object 181*4882a593Smuzhiyun properties: 182*4882a593Smuzhiyun compatible: 183*4882a593Smuzhiyun oneOf: 184*4882a593Smuzhiyun - enum: 185*4882a593Smuzhiyun - ingenic,jz4725b-ost 186*4882a593Smuzhiyun - ingenic,jz4770-ost 187*4882a593Smuzhiyun - items: 188*4882a593Smuzhiyun - const: ingenic,jz4780-ost 189*4882a593Smuzhiyun - const: ingenic,jz4770-ost 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun reg: 192*4882a593Smuzhiyun maxItems: 1 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun clocks: 195*4882a593Smuzhiyun maxItems: 1 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun clock-names: 198*4882a593Smuzhiyun const: ost 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun interrupts: 201*4882a593Smuzhiyun maxItems: 1 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun required: 204*4882a593Smuzhiyun - compatible 205*4882a593Smuzhiyun - reg 206*4882a593Smuzhiyun - clocks 207*4882a593Smuzhiyun - clock-names 208*4882a593Smuzhiyun - interrupts 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun additionalProperties: false 211*4882a593Smuzhiyun 212*4882a593Smuzhiyunrequired: 213*4882a593Smuzhiyun - "#clock-cells" 214*4882a593Smuzhiyun - "#interrupt-cells" 215*4882a593Smuzhiyun - interrupt-controller 216*4882a593Smuzhiyun - compatible 217*4882a593Smuzhiyun - reg 218*4882a593Smuzhiyun - clocks 219*4882a593Smuzhiyun - clock-names 220*4882a593Smuzhiyun - interrupts 221*4882a593Smuzhiyun 222*4882a593SmuzhiyunadditionalProperties: false 223*4882a593Smuzhiyun 224*4882a593Smuzhiyunexamples: 225*4882a593Smuzhiyun - | 226*4882a593Smuzhiyun #include <dt-bindings/clock/jz4770-cgu.h> 227*4882a593Smuzhiyun #include <dt-bindings/clock/ingenic,tcu.h> 228*4882a593Smuzhiyun tcu: timer@10002000 { 229*4882a593Smuzhiyun compatible = "ingenic,jz4770-tcu", "simple-mfd"; 230*4882a593Smuzhiyun reg = <0x10002000 0x1000>; 231*4882a593Smuzhiyun #address-cells = <1>; 232*4882a593Smuzhiyun #size-cells = <1>; 233*4882a593Smuzhiyun ranges = <0x0 0x10002000 0x1000>; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun #clock-cells = <1>; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun clocks = <&cgu JZ4770_CLK_RTC>, 238*4882a593Smuzhiyun <&cgu JZ4770_CLK_EXT>, 239*4882a593Smuzhiyun <&cgu JZ4770_CLK_PCLK>; 240*4882a593Smuzhiyun clock-names = "rtc", "ext", "pclk"; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun interrupt-controller; 243*4882a593Smuzhiyun #interrupt-cells = <1>; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun interrupt-parent = <&intc>; 246*4882a593Smuzhiyun interrupts = <27 26 25>; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun watchdog: watchdog@0 { 249*4882a593Smuzhiyun compatible = "ingenic,jz4770-watchdog", "ingenic,jz4740-watchdog"; 250*4882a593Smuzhiyun reg = <0x0 0xc>; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun clocks = <&tcu TCU_CLK_WDT>; 253*4882a593Smuzhiyun clock-names = "wdt"; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun pwm: pwm@40 { 257*4882a593Smuzhiyun compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm"; 258*4882a593Smuzhiyun reg = <0x40 0x80>; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun #pwm-cells = <3>; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun clocks = <&tcu TCU_CLK_TIMER0>, 263*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER1>, 264*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER2>, 265*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER3>, 266*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER4>, 267*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER5>, 268*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER6>, 269*4882a593Smuzhiyun <&tcu TCU_CLK_TIMER7>; 270*4882a593Smuzhiyun clock-names = "timer0", "timer1", "timer2", "timer3", 271*4882a593Smuzhiyun "timer4", "timer5", "timer6", "timer7"; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun ost: timer@e0 { 275*4882a593Smuzhiyun compatible = "ingenic,jz4770-ost"; 276*4882a593Smuzhiyun reg = <0xe0 0x20>; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun clocks = <&tcu TCU_CLK_OST>; 279*4882a593Smuzhiyun clock-names = "ost"; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun interrupts = <15>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun }; 284