1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/timer/ingenic,sysost.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Bindings for SYSOST in Ingenic XBurst family SoCs 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun The SYSOST in an Ingenic SoC provides one 64bit timer for clocksource 14*4882a593Smuzhiyun and one or more 32bit timers for clockevent. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun "#clock-cells": 18*4882a593Smuzhiyun const: 1 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun compatible: 21*4882a593Smuzhiyun enum: 22*4882a593Smuzhiyun - ingenic,x1000-ost 23*4882a593Smuzhiyun - ingenic,x2000-ost 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun clocks: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clock-names: 32*4882a593Smuzhiyun const: ost 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun interrupts: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunrequired: 38*4882a593Smuzhiyun - "#clock-cells" 39*4882a593Smuzhiyun - compatible 40*4882a593Smuzhiyun - reg 41*4882a593Smuzhiyun - clocks 42*4882a593Smuzhiyun - clock-names 43*4882a593Smuzhiyun - interrupts 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunadditionalProperties: false 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunexamples: 48*4882a593Smuzhiyun - | 49*4882a593Smuzhiyun #include <dt-bindings/clock/x1000-cgu.h> 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun ost: timer@12000000 { 52*4882a593Smuzhiyun compatible = "ingenic,x1000-ost"; 53*4882a593Smuzhiyun reg = <0x12000000 0x3c>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #clock-cells = <1>; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun clocks = <&cgu X1000_CLK_OST>; 58*4882a593Smuzhiyun clock-names = "ost"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun interrupt-parent = <&cpuintc>; 61*4882a593Smuzhiyun interrupts = <3>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun... 64