1*4882a593Smuzhiyun* Pistachio general-purpose timer based clocksource 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible: "img,pistachio-gptimer". 5*4882a593Smuzhiyun - reg: Address range of the timer registers. 6*4882a593Smuzhiyun - interrupts: An interrupt for each of the four timers 7*4882a593Smuzhiyun - clocks: Should contain a clock specifier for each entry in clock-names 8*4882a593Smuzhiyun - clock-names: Should contain the following entries: 9*4882a593Smuzhiyun "sys", interface clock 10*4882a593Smuzhiyun "slow", slow counter clock 11*4882a593Smuzhiyun "fast", fast counter clock 12*4882a593Smuzhiyun - img,cr-periph: Must contain a phandle to the peripheral control 13*4882a593Smuzhiyun syscon node. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample: 16*4882a593Smuzhiyun timer: timer@18102000 { 17*4882a593Smuzhiyun compatible = "img,pistachio-gptimer"; 18*4882a593Smuzhiyun reg = <0x18102000 0x100>; 19*4882a593Smuzhiyun interrupts = <GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH>, 20*4882a593Smuzhiyun <GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH>, 21*4882a593Smuzhiyun <GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH>, 22*4882a593Smuzhiyun <GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH>; 23*4882a593Smuzhiyun clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>, 24*4882a593Smuzhiyun <&clk_periph PERIPH_CLK_COUNTER_SLOW>, 25*4882a593Smuzhiyun <&cr_periph SYS_CLK_TIMER>; 26*4882a593Smuzhiyun clock-names = "fast", "slow", "sys"; 27*4882a593Smuzhiyun img,cr-periph = <&cr_periph>; 28*4882a593Smuzhiyun }; 29