1*4882a593Smuzhiyun================= 2*4882a593Smuzhiyungx6605s SOC Timer 3*4882a593Smuzhiyun================= 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe timer is used in gx6605s soc as system timer and the driver 6*4882a593Smuzhiyuncontain clk event and clk source. 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun============================== 9*4882a593Smuzhiyuntimer node bindings definition 10*4882a593Smuzhiyun============================== 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun Description: Describes gx6605s SOC timer 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun PROPERTIES 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun - compatible 17*4882a593Smuzhiyun Usage: required 18*4882a593Smuzhiyun Value type: <string> 19*4882a593Smuzhiyun Definition: must be "csky,gx6605s-timer" 20*4882a593Smuzhiyun - reg 21*4882a593Smuzhiyun Usage: required 22*4882a593Smuzhiyun Value type: <u32 u32> 23*4882a593Smuzhiyun Definition: <phyaddr size> in soc from cpu view 24*4882a593Smuzhiyun - clocks 25*4882a593Smuzhiyun Usage: required 26*4882a593Smuzhiyun Value type: phandle + clock specifier cells 27*4882a593Smuzhiyun Definition: must be input clk node 28*4882a593Smuzhiyun - interrupt 29*4882a593Smuzhiyun Usage: required 30*4882a593Smuzhiyun Value type: <u32> 31*4882a593Smuzhiyun Definition: must be timer irq num defined by soc 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunExamples: 34*4882a593Smuzhiyun--------- 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun timer0: timer@20a000 { 37*4882a593Smuzhiyun compatible = "csky,gx6605s-timer"; 38*4882a593Smuzhiyun reg = <0x0020a000 0x400>; 39*4882a593Smuzhiyun clocks = <&dummy_apb_clk>; 40*4882a593Smuzhiyun interrupts = <10>; 41*4882a593Smuzhiyun interrupt-parent = <&intc>; 42*4882a593Smuzhiyun }; 43