1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/timer/arm,global_timer.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: ARM Global Timer 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Stuart Menefy <stuart.menefy@st.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun Cortex-A9 are often associated with a per-core Global timer. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun items: 18*4882a593Smuzhiyun - enum: 19*4882a593Smuzhiyun - arm,cortex-a5-global-timer 20*4882a593Smuzhiyun - arm,cortex-a9-global-timer 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun description: driver supports versions r2p0 and above. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun interrupts: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun clocks: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunrequired: 34*4882a593Smuzhiyun - compatible 35*4882a593Smuzhiyun - reg 36*4882a593Smuzhiyun - clocks 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunadditionalProperties: false 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunexamples: 41*4882a593Smuzhiyun - | 42*4882a593Smuzhiyun timer@2c000600 { 43*4882a593Smuzhiyun compatible = "arm,cortex-a9-global-timer"; 44*4882a593Smuzhiyun reg = <0x2c000600 0x20>; 45*4882a593Smuzhiyun interrupts = <1 13 0xf01>; 46*4882a593Smuzhiyun clocks = <&arm_periph_clk>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun... 49