1*4882a593SmuzhiyunAmlogic Meson6 SoCs Timer Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible : should be "amlogic,meson6-timer" 6*4882a593Smuzhiyun- reg : Specifies base physical address and size of the registers. 7*4882a593Smuzhiyun- interrupts : The four interrupts, one for each timer event 8*4882a593Smuzhiyun- clocks : phandles to the pclk (system clock) and XTAL clocks 9*4882a593Smuzhiyun- clock-names : must contain "pclk" and "xtal" 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunExample: 12*4882a593Smuzhiyun 13*4882a593Smuzhiyuntimer@c1109940 { 14*4882a593Smuzhiyun compatible = "amlogic,meson6-timer"; 15*4882a593Smuzhiyun reg = <0xc1109940 0x14>; 16*4882a593Smuzhiyun interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>, 17*4882a593Smuzhiyun <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>, 18*4882a593Smuzhiyun <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>, 19*4882a593Smuzhiyun <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>; 20*4882a593Smuzhiyun clocks = <&xtal>, <&clk81>; 21*4882a593Smuzhiyun clock-names = "xtal", "pclk"; 22*4882a593Smuzhiyun}; 23