xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Anson Huang <Anson.Huang@nxp.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunproperties:
13*4882a593Smuzhiyun  compatible:
14*4882a593Smuzhiyun    description: |
15*4882a593Smuzhiyun      The version of the device is determined by the TMU IP Block Revision
16*4882a593Smuzhiyun      Register (IPBRR0) at offset 0x0BF8.
17*4882a593Smuzhiyun      Table of correspondences between IPBRR0 values and example chips:
18*4882a593Smuzhiyun            Value           Device
19*4882a593Smuzhiyun            ----------      -----
20*4882a593Smuzhiyun            0x01900102      T1040
21*4882a593Smuzhiyun    enum:
22*4882a593Smuzhiyun      - fsl,qoriq-tmu
23*4882a593Smuzhiyun      - fsl,imx8mq-tmu
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  reg:
26*4882a593Smuzhiyun    maxItems: 1
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  interrupts:
29*4882a593Smuzhiyun    maxItems: 1
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  fsl,tmu-range:
32*4882a593Smuzhiyun    $ref: '/schemas/types.yaml#/definitions/uint32-array'
33*4882a593Smuzhiyun    description: |
34*4882a593Smuzhiyun      The values to be programmed into TTRnCR, as specified by the SoC
35*4882a593Smuzhiyun      reference manual. The first cell is TTR0CR, the second is TTR1CR, etc.
36*4882a593Smuzhiyun    maxItems: 4
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  fsl,tmu-calibration:
39*4882a593Smuzhiyun    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
40*4882a593Smuzhiyun    description: |
41*4882a593Smuzhiyun      A list of cell pairs containing temperature calibration data, as
42*4882a593Smuzhiyun      specified by the SoC reference manual. The first cell of each pair
43*4882a593Smuzhiyun      is the value to be written to TTCFGR, and the second is the value
44*4882a593Smuzhiyun      to be written to TSCFGR.
45*4882a593Smuzhiyun    items:
46*4882a593Smuzhiyun      items:
47*4882a593Smuzhiyun        - description: value for TTCFGR
48*4882a593Smuzhiyun        - description: value for TSCFGR
49*4882a593Smuzhiyun    minItems: 1
50*4882a593Smuzhiyun    maxItems: 64
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun  little-endian:
53*4882a593Smuzhiyun    description: |
54*4882a593Smuzhiyun      boolean, if present, the TMU registers are little endian. If absent,
55*4882a593Smuzhiyun      the default is big endian.
56*4882a593Smuzhiyun    type: boolean
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun  clocks:
59*4882a593Smuzhiyun    maxItems: 1
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  "#thermal-sensor-cells":
62*4882a593Smuzhiyun    const: 1
63*4882a593Smuzhiyun
64*4882a593Smuzhiyunrequired:
65*4882a593Smuzhiyun  - compatible
66*4882a593Smuzhiyun  - reg
67*4882a593Smuzhiyun  - interrupts
68*4882a593Smuzhiyun  - fsl,tmu-range
69*4882a593Smuzhiyun  - fsl,tmu-calibration
70*4882a593Smuzhiyun  - '#thermal-sensor-cells'
71*4882a593Smuzhiyun
72*4882a593SmuzhiyunadditionalProperties: false
73*4882a593Smuzhiyun
74*4882a593Smuzhiyunexamples:
75*4882a593Smuzhiyun  - |
76*4882a593Smuzhiyun    tmu@f0000 {
77*4882a593Smuzhiyun        compatible = "fsl,qoriq-tmu";
78*4882a593Smuzhiyun        reg = <0xf0000 0x1000>;
79*4882a593Smuzhiyun        interrupts = <18 2 0 0>;
80*4882a593Smuzhiyun        fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81*4882a593Smuzhiyun        fsl,tmu-calibration = <0x00000000 0x00000025>,
82*4882a593Smuzhiyun                              <0x00000001 0x00000028>,
83*4882a593Smuzhiyun                              <0x00000002 0x0000002d>,
84*4882a593Smuzhiyun                              <0x00000003 0x00000031>,
85*4882a593Smuzhiyun                              <0x00000004 0x00000036>,
86*4882a593Smuzhiyun                              <0x00000005 0x0000003a>,
87*4882a593Smuzhiyun                              <0x00000006 0x00000040>,
88*4882a593Smuzhiyun                              <0x00000007 0x00000044>,
89*4882a593Smuzhiyun                              <0x00000008 0x0000004a>,
90*4882a593Smuzhiyun                              <0x00000009 0x0000004f>,
91*4882a593Smuzhiyun                              <0x0000000a 0x00000054>,
92*4882a593Smuzhiyun                              <0x00010000 0x0000000d>,
93*4882a593Smuzhiyun                              <0x00010001 0x00000013>,
94*4882a593Smuzhiyun                              <0x00010002 0x00000019>,
95*4882a593Smuzhiyun                              <0x00010003 0x0000001f>,
96*4882a593Smuzhiyun                              <0x00010004 0x00000025>,
97*4882a593Smuzhiyun                              <0x00010005 0x0000002d>,
98*4882a593Smuzhiyun                              <0x00010006 0x00000033>,
99*4882a593Smuzhiyun                              <0x00010007 0x00000043>,
100*4882a593Smuzhiyun                              <0x00010008 0x0000004b>,
101*4882a593Smuzhiyun                              <0x00010009 0x00000053>,
102*4882a593Smuzhiyun                              <0x00020000 0x00000010>,
103*4882a593Smuzhiyun                              <0x00020001 0x00000017>,
104*4882a593Smuzhiyun                              <0x00020002 0x0000001f>,
105*4882a593Smuzhiyun                              <0x00020003 0x00000029>,
106*4882a593Smuzhiyun                              <0x00020004 0x00000031>,
107*4882a593Smuzhiyun                              <0x00020005 0x0000003c>,
108*4882a593Smuzhiyun                              <0x00020006 0x00000042>,
109*4882a593Smuzhiyun                              <0x00020007 0x0000004d>,
110*4882a593Smuzhiyun                              <0x00020008 0x00000056>,
111*4882a593Smuzhiyun                              <0x00030000 0x00000012>,
112*4882a593Smuzhiyun                              <0x00030001 0x0000001d>;
113*4882a593Smuzhiyun        #thermal-sensor-cells = <1>;
114*4882a593Smuzhiyun    };
115