xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/exynos-thermal.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Exynos Thermal Management Unit (TMU)
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun** Required properties:
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun- compatible : One of the following:
6*4882a593Smuzhiyun	       "samsung,exynos3250-tmu"
7*4882a593Smuzhiyun	       "samsung,exynos4412-tmu"
8*4882a593Smuzhiyun	       "samsung,exynos4210-tmu"
9*4882a593Smuzhiyun	       "samsung,exynos5250-tmu"
10*4882a593Smuzhiyun	       "samsung,exynos5260-tmu"
11*4882a593Smuzhiyun	       "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420
12*4882a593Smuzhiyun	       "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
13*4882a593Smuzhiyun			Exynos5420 (Must pass triminfo base and triminfo clock)
14*4882a593Smuzhiyun               "samsung,exynos5433-tmu"
15*4882a593Smuzhiyun	       "samsung,exynos7-tmu"
16*4882a593Smuzhiyun- reg : Address range of the thermal registers. For soc's which has multiple
17*4882a593Smuzhiyun	instances of TMU and some registers are shared across all TMU's like
18*4882a593Smuzhiyun	interrupt related then 2 set of register has to supplied. First set
19*4882a593Smuzhiyun	belongs	to register set of TMU instance and second set belongs to
20*4882a593Smuzhiyun	registers shared with the TMU instance.
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
23*4882a593Smuzhiyun	channels 2, 3 and 4
24*4882a593Smuzhiyun	Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced
25*4882a593Smuzhiyun	register, also provide clock to access that base.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	TRIMINFO at 0x1006c000 contains data for TMU channel 3
28*4882a593Smuzhiyun	TRIMINFO at 0x100a0000 contains data for TMU channel 4
29*4882a593Smuzhiyun	TRIMINFO at 0x10068000 contains data for TMU channel 2
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun- interrupts : Should contain interrupt for thermal system
32*4882a593Smuzhiyun- clocks : The main clocks for TMU device
33*4882a593Smuzhiyun	-- 1. operational clock for TMU channel
34*4882a593Smuzhiyun	-- 2. optional clock to access the shared registers of TMU channel
35*4882a593Smuzhiyun	-- 3. optional special clock for functional operation
36*4882a593Smuzhiyun- clock-names : Thermal system clock name
37*4882a593Smuzhiyun	-- "tmu_apbif" operational clock for current TMU channel
38*4882a593Smuzhiyun	-- "tmu_triminfo_apbif" clock to access the shared triminfo register
39*4882a593Smuzhiyun		for current TMU channel
40*4882a593Smuzhiyun	-- "tmu_sclk" clock for functional operation of the current TMU
41*4882a593Smuzhiyun		channel
42*4882a593Smuzhiyun
43*4882a593SmuzhiyunThe Exynos TMU supports generating interrupts when reaching given
44*4882a593Smuzhiyuntemperature thresholds. Number of supported thermal trip points depends
45*4882a593Smuzhiyunon the SoC (only first trip points defined in DT will be configured):
46*4882a593Smuzhiyun - most of SoC: 4
47*4882a593Smuzhiyun - samsung,exynos5433-tmu: 8
48*4882a593Smuzhiyun - samsung,exynos7-tmu: 8
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun** Optional properties:
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun- vtmu-supply: This entry is optional and provides the regulator node supplying
53*4882a593Smuzhiyun		voltage to TMU. If needed this entry can be placed inside
54*4882a593Smuzhiyun		board/platform specific dts file.
55*4882a593Smuzhiyun
56*4882a593SmuzhiyunExample 1):
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	tmu@100c0000 {
59*4882a593Smuzhiyun		compatible = "samsung,exynos4412-tmu";
60*4882a593Smuzhiyun		interrupt-parent = <&combiner>;
61*4882a593Smuzhiyun		reg = <0x100C0000 0x100>;
62*4882a593Smuzhiyun		interrupts = <2 4>;
63*4882a593Smuzhiyun		clocks = <&clock 383>;
64*4882a593Smuzhiyun		clock-names = "tmu_apbif";
65*4882a593Smuzhiyun		vtmu-supply = <&tmu_regulator_node>;
66*4882a593Smuzhiyun		#thermal-sensor-cells = <0>;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593SmuzhiyunExample 2): (In case of Exynos5420 "with misplaced TRIMINFO register")
70*4882a593Smuzhiyun	tmu_cpu2: tmu@10068000 {
71*4882a593Smuzhiyun		compatible = "samsung,exynos5420-tmu-ext-triminfo";
72*4882a593Smuzhiyun		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
73*4882a593Smuzhiyun		interrupts = <0 184 0>;
74*4882a593Smuzhiyun		clocks = <&clock 318>, <&clock 318>;
75*4882a593Smuzhiyun		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
76*4882a593Smuzhiyun		#thermal-sensor-cells = <0>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	tmu_cpu3: tmu@1006c000 {
80*4882a593Smuzhiyun		compatible = "samsung,exynos5420-tmu-ext-triminfo";
81*4882a593Smuzhiyun		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
82*4882a593Smuzhiyun		interrupts = <0 185 0>;
83*4882a593Smuzhiyun		clocks = <&clock 318>, <&clock 319>;
84*4882a593Smuzhiyun		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
85*4882a593Smuzhiyun		#thermal-sensor-cells = <0>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	tmu_gpu: tmu@100a0000 {
89*4882a593Smuzhiyun		compatible = "samsung,exynos5420-tmu-ext-triminfo";
90*4882a593Smuzhiyun		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
91*4882a593Smuzhiyun		interrupts = <0 215 0>;
92*4882a593Smuzhiyun		clocks = <&clock 319>, <&clock 318>;
93*4882a593Smuzhiyun		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
94*4882a593Smuzhiyun		#thermal-sensor-cells = <0>;
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593SmuzhiyunNote: For multi-instance tmu each instance should have an alias correctly
98*4882a593Smuzhiyunnumbered in "aliases" node.
99*4882a593Smuzhiyun
100*4882a593SmuzhiyunExample:
101*4882a593Smuzhiyun
102*4882a593Smuzhiyunaliases {
103*4882a593Smuzhiyun	tmuctrl0 = &tmuctrl_0;
104*4882a593Smuzhiyun	tmuctrl1 = &tmuctrl_1;
105*4882a593Smuzhiyun	tmuctrl2 = &tmuctrl_2;
106*4882a593Smuzhiyun};
107