1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Brian Masney <masneyb@onstation.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and 14*4882a593Smuzhiyun audio components on some Snapdragon SoCs. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun const: qcom,msm8974-ocmem 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reg: 21*4882a593Smuzhiyun items: 22*4882a593Smuzhiyun - description: Control registers 23*4882a593Smuzhiyun - description: OCMEM address range 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg-names: 26*4882a593Smuzhiyun items: 27*4882a593Smuzhiyun - const: ctrl 28*4882a593Smuzhiyun - const: mem 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun clocks: 31*4882a593Smuzhiyun items: 32*4882a593Smuzhiyun - description: Core clock 33*4882a593Smuzhiyun - description: Interface clock 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clock-names: 36*4882a593Smuzhiyun items: 37*4882a593Smuzhiyun - const: core 38*4882a593Smuzhiyun - const: iface 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun '#address-cells': 41*4882a593Smuzhiyun const: 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun '#size-cells': 44*4882a593Smuzhiyun const: 1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun ranges: 47*4882a593Smuzhiyun maxItems: 1 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunrequired: 50*4882a593Smuzhiyun - compatible 51*4882a593Smuzhiyun - reg 52*4882a593Smuzhiyun - reg-names 53*4882a593Smuzhiyun - clocks 54*4882a593Smuzhiyun - clock-names 55*4882a593Smuzhiyun - '#address-cells' 56*4882a593Smuzhiyun - '#size-cells' 57*4882a593Smuzhiyun - ranges 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunadditionalProperties: false 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunpatternProperties: 62*4882a593Smuzhiyun "-sram@[0-9a-f]+$": 63*4882a593Smuzhiyun type: object 64*4882a593Smuzhiyun description: A region of reserved memory. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun properties: 67*4882a593Smuzhiyun reg: 68*4882a593Smuzhiyun maxItems: 1 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun required: 71*4882a593Smuzhiyun - reg 72*4882a593Smuzhiyun 73*4882a593Smuzhiyunexamples: 74*4882a593Smuzhiyun - | 75*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,rpmcc.h> 76*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun ocmem: ocmem@fdd00000 { 79*4882a593Smuzhiyun compatible = "qcom,msm8974-ocmem"; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun reg = <0xfdd00000 0x2000>, 82*4882a593Smuzhiyun <0xfec00000 0x180000>; 83*4882a593Smuzhiyun reg-names = "ctrl", 84*4882a593Smuzhiyun "mem"; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, 87*4882a593Smuzhiyun <&mmcc OCMEMCX_OCMEMNOC_CLK>; 88*4882a593Smuzhiyun clock-names = "core", 89*4882a593Smuzhiyun "iface"; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #address-cells = <1>; 92*4882a593Smuzhiyun #size-cells = <1>; 93*4882a593Smuzhiyun ranges = <0 0xfec00000 0x100000>; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun gmu-sram@0 { 96*4882a593Smuzhiyun reg = <0x0 0x100000>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99