xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 SPI Controller bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyundescription: |
10*4882a593Smuzhiyun  The STM32 SPI controller is used to communicate with external devices using
11*4882a593Smuzhiyun  the Serial Peripheral Interface. It supports full-duplex, half-duplex and
12*4882a593Smuzhiyun  simplex synchronous serial communication with external devices. It supports
13*4882a593Smuzhiyun  from 4 to 32-bit data size.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunmaintainers:
16*4882a593Smuzhiyun  - Erwan Leray <erwan.leray@st.com>
17*4882a593Smuzhiyun  - Fabrice Gasnier <fabrice.gasnier@st.com>
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunallOf:
20*4882a593Smuzhiyun  - $ref: "spi-controller.yaml#"
21*4882a593Smuzhiyun  - if:
22*4882a593Smuzhiyun      properties:
23*4882a593Smuzhiyun        compatible:
24*4882a593Smuzhiyun          contains:
25*4882a593Smuzhiyun            const: st,stm32f4-spi
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun    then:
28*4882a593Smuzhiyun      properties:
29*4882a593Smuzhiyun        st,spi-midi-ns: false
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunproperties:
32*4882a593Smuzhiyun  compatible:
33*4882a593Smuzhiyun    enum:
34*4882a593Smuzhiyun      - st,stm32f4-spi
35*4882a593Smuzhiyun      - st,stm32h7-spi
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  reg:
38*4882a593Smuzhiyun    maxItems: 1
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  clocks:
41*4882a593Smuzhiyun    maxItems: 1
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun  interrupts:
44*4882a593Smuzhiyun    maxItems: 1
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  resets:
47*4882a593Smuzhiyun    maxItems: 1
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  dmas:
50*4882a593Smuzhiyun    description: |
51*4882a593Smuzhiyun      DMA specifiers for tx and rx dma. DMA fifo mode must be used. See
52*4882a593Smuzhiyun      the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml.
53*4882a593Smuzhiyun    items:
54*4882a593Smuzhiyun      - description: rx DMA channel
55*4882a593Smuzhiyun      - description: tx DMA channel
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun  dma-names:
58*4882a593Smuzhiyun    items:
59*4882a593Smuzhiyun      - const: rx
60*4882a593Smuzhiyun      - const: tx
61*4882a593Smuzhiyun
62*4882a593SmuzhiyunpatternProperties:
63*4882a593Smuzhiyun  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
64*4882a593Smuzhiyun    type: object
65*4882a593Smuzhiyun    # SPI slave nodes must be children of the SPI master node and can
66*4882a593Smuzhiyun    # contain the following properties.
67*4882a593Smuzhiyun    properties:
68*4882a593Smuzhiyun      st,spi-midi-ns:
69*4882a593Smuzhiyun        description: |
70*4882a593Smuzhiyun          Only for STM32H7, (Master Inter-Data Idleness) minimum time
71*4882a593Smuzhiyun          delay in nanoseconds inserted between two consecutive data frames.
72*4882a593Smuzhiyun
73*4882a593Smuzhiyunrequired:
74*4882a593Smuzhiyun  - compatible
75*4882a593Smuzhiyun  - reg
76*4882a593Smuzhiyun  - clocks
77*4882a593Smuzhiyun  - interrupts
78*4882a593Smuzhiyun
79*4882a593SmuzhiyununevaluatedProperties: false
80*4882a593Smuzhiyun
81*4882a593Smuzhiyunexamples:
82*4882a593Smuzhiyun  - |
83*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
84*4882a593Smuzhiyun    #include <dt-bindings/clock/stm32mp1-clks.h>
85*4882a593Smuzhiyun    #include <dt-bindings/reset/stm32mp1-resets.h>
86*4882a593Smuzhiyun    spi@4000b000 {
87*4882a593Smuzhiyun      #address-cells = <1>;
88*4882a593Smuzhiyun      #size-cells = <0>;
89*4882a593Smuzhiyun      compatible = "st,stm32h7-spi";
90*4882a593Smuzhiyun      reg = <0x4000b000 0x400>;
91*4882a593Smuzhiyun      interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
92*4882a593Smuzhiyun      clocks = <&rcc SPI2_K>;
93*4882a593Smuzhiyun      resets = <&rcc SPI2_R>;
94*4882a593Smuzhiyun      dmas = <&dmamux1 0 39 0x400 0x05>,
95*4882a593Smuzhiyun             <&dmamux1 1 40 0x400 0x05>;
96*4882a593Smuzhiyun      dma-names = "rx", "tx";
97*4882a593Smuzhiyun      cs-gpios = <&gpioa 11 0>;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun      aardvark@0 {
100*4882a593Smuzhiyun        compatible = "totalphase,aardvark";
101*4882a593Smuzhiyun        reg = <0>;
102*4882a593Smuzhiyun        spi-max-frequency = <4000000>;
103*4882a593Smuzhiyun        st,spi-midi-ns = <4000>;
104*4882a593Smuzhiyun      };
105*4882a593Smuzhiyun    };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun...
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