1*4882a593SmuzhiyunMicrochip PIC32 Quad SPI controller 2*4882a593Smuzhiyun----------------------------------- 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "microchip,pic32mzda-sqi". 5*4882a593Smuzhiyun- reg: Address and length of SQI controller register space. 6*4882a593Smuzhiyun- interrupts: Should contain SQI interrupt. 7*4882a593Smuzhiyun- clocks: Should contain phandle of two clocks in sequence, one that drives 8*4882a593Smuzhiyun clock on SPI bus and other that drives SQI controller. 9*4882a593Smuzhiyun- clock-names: Should be "spi_ck" and "reg_ck" in order. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunExample: 12*4882a593Smuzhiyun sqi1: spi@1f8e2000 { 13*4882a593Smuzhiyun compatible = "microchip,pic32mzda-sqi"; 14*4882a593Smuzhiyun reg = <0x1f8e2000 0x200>; 15*4882a593Smuzhiyun clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>; 16*4882a593Smuzhiyun clock-names = "spi_ck", "reg_ck"; 17*4882a593Smuzhiyun interrupts = <169 IRQ_TYPE_LEVEL_HIGH>; 18*4882a593Smuzhiyun }; 19