1*4882a593SmuzhiyunSTMicroelectronics SSC (SPI) Controller 2*4882a593Smuzhiyun--------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible : "st,comms-ssc4-spi" 6*4882a593Smuzhiyun- reg : Offset and length of the device's register set 7*4882a593Smuzhiyun- interrupts : The interrupt specifier 8*4882a593Smuzhiyun- clock-names : Must contain "ssc" 9*4882a593Smuzhiyun- clocks : Must contain an entry for each name in clock-names 10*4882a593Smuzhiyun See ../clk/* 11*4882a593Smuzhiyun- pinctrl-names : Uses "default", can use "sleep" if provided 12*4882a593Smuzhiyun See ../pinctrl/pinctrl-bindings.txt 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunOptional properties: 15*4882a593Smuzhiyun- cs-gpios : List of GPIO chip selects 16*4882a593Smuzhiyun See ../spi/spi-bus.txt 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunChild nodes represent devices on the SPI bus 19*4882a593Smuzhiyun See ../spi/spi-bus.txt 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun spi@9840000 { 23*4882a593Smuzhiyun compatible = "st,comms-ssc4-spi"; 24*4882a593Smuzhiyun reg = <0x9840000 0x110>; 25*4882a593Smuzhiyun interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 26*4882a593Smuzhiyun clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; 27*4882a593Smuzhiyun clock-names = "ssc"; 28*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi0_default>; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun cs-gpios = <&pio17 5 0>; 31*4882a593Smuzhiyun #address-cells = <1>; 32*4882a593Smuzhiyun #size-cells = <0>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun st95hf@0{ 35*4882a593Smuzhiyun compatible = "st,st95hf"; 36*4882a593Smuzhiyun reg = <0>; 37*4882a593Smuzhiyun spi-max-frequency = <1000000>; 38*4882a593Smuzhiyun interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41