xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/spi-samsung.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Samsung SPI Controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe Samsung SPI controller is used to interface with various devices such as flash
4*4882a593Smuzhiyunand display controllers using the SPI communication interface.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunRequired SoC Specific Properties:
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- compatible: should be one of the following.
9*4882a593Smuzhiyun    - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10*4882a593Smuzhiyun    - samsung,s3c6410-spi: for s3c6410 platforms
11*4882a593Smuzhiyun    - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12*4882a593Smuzhiyun    - samsung,exynos5433-spi: for exynos5433 compatible controllers
13*4882a593Smuzhiyun    - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped
16*4882a593Smuzhiyun  region.
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun- interrupts: The interrupt number to the cpu. The interrupt specifier format
19*4882a593Smuzhiyun  depends on the interrupt controller.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun- dmas : Two or more DMA channel specifiers following the convention outlined
22*4882a593Smuzhiyun  in bindings/dma/dma.txt
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun- dma-names: Names for the dma channels. There must be at least one channel
25*4882a593Smuzhiyun  named "tx" for transmit and named "rx" for receive.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun- clocks: specifies the clock IDs provided to the SPI controller; they are
28*4882a593Smuzhiyun  required for interacting with the controller itself, for synchronizing the bus
29*4882a593Smuzhiyun  and as I/O clock (the latter is required by exynos5433 and exynos7).
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun- clock-names: string names of the clocks in the 'clocks' property; for all the
32*4882a593Smuzhiyun  the devices the names must be "spi", "spi_busclkN" (where N is determined by
33*4882a593Smuzhiyun  "samsung,spi-src-clk"), while Exynos5433 should specify a third clock
34*4882a593Smuzhiyun  "spi_ioclk" for the I/O clock.
35*4882a593Smuzhiyun
36*4882a593SmuzhiyunRequired Board Specific Properties:
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun- #address-cells: should be 1.
39*4882a593Smuzhiyun- #size-cells: should be 0.
40*4882a593Smuzhiyun
41*4882a593SmuzhiyunOptional Board Specific Properties:
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
44*4882a593Smuzhiyun  select the clock source for the spi bus clock, this property can be used to
45*4882a593Smuzhiyun  indicate the clock to be used for driving the spi bus clock. If not specified,
46*4882a593Smuzhiyun  the clock number 0 is used as default.
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun- num-cs: Specifies the number of chip select lines supported. If
49*4882a593Smuzhiyun  not specified, the default number of chip select lines is set to 1.
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt)
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun- no-cs-readback: the CS line is disconnected, therefore the device should not
54*4882a593Smuzhiyun  operate based on CS signalling.
55*4882a593Smuzhiyun
56*4882a593SmuzhiyunSPI Controller specific data in SPI slave nodes:
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun- The spi slave nodes should provide the following information which is required
59*4882a593Smuzhiyun  by the spi controller.
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
62*4882a593Smuzhiyun    miso line (to account for any lag in the miso line). The following are the
63*4882a593Smuzhiyun    valid values.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun      - 0: No phase shift.
66*4882a593Smuzhiyun      - 1: 90 degree phase shift sampling.
67*4882a593Smuzhiyun      - 2: 180 degree phase shift sampling.
68*4882a593Smuzhiyun      - 3: 270 degree phase shift sampling.
69*4882a593Smuzhiyun
70*4882a593SmuzhiyunAliases:
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun- All the SPI controller nodes should be represented in the aliases node using
73*4882a593Smuzhiyun  the following format 'spi{n}' where n is a unique number for the alias.
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun
76*4882a593SmuzhiyunExample:
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun- SoC Specific Portion:
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	spi_0: spi@12d20000 {
81*4882a593Smuzhiyun		compatible = "samsung,exynos4210-spi";
82*4882a593Smuzhiyun		reg = <0x12d20000 0x100>;
83*4882a593Smuzhiyun		interrupts = <0 66 0>;
84*4882a593Smuzhiyun		dmas = <&pdma0 5
85*4882a593Smuzhiyun			&pdma0 4>;
86*4882a593Smuzhiyun		dma-names = "tx", "rx";
87*4882a593Smuzhiyun		#address-cells = <1>;
88*4882a593Smuzhiyun		#size-cells = <0>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun- Board Specific Portion:
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	spi_0: spi@12d20000 {
94*4882a593Smuzhiyun		#address-cells = <1>;
95*4882a593Smuzhiyun		#size-cells = <0>;
96*4882a593Smuzhiyun		pinctrl-names = "default";
97*4882a593Smuzhiyun		pinctrl-0 = <&spi0_bus>;
98*4882a593Smuzhiyun		cs-gpios = <&gpa2 5 0>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		w25q80bw@0 {
101*4882a593Smuzhiyun			#address-cells = <1>;
102*4882a593Smuzhiyun			#size-cells = <1>;
103*4882a593Smuzhiyun			compatible = "w25x80";
104*4882a593Smuzhiyun			reg = <0>;
105*4882a593Smuzhiyun			spi-max-frequency = <10000>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun			controller-data {
108*4882a593Smuzhiyun				samsung,spi-feedback-delay = <0>;
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun			partition@0 {
112*4882a593Smuzhiyun				label = "U-Boot";
113*4882a593Smuzhiyun				reg = <0x0 0x40000>;
114*4882a593Smuzhiyun				read-only;
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun			partition@40000 {
118*4882a593Smuzhiyun				label = "Kernel";
119*4882a593Smuzhiyun				reg = <0x40000 0xc0000>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun	};
123