1*4882a593SmuzhiyunBinding for MTK SPI controller (MT7621 MIPS) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be one of the following: 5*4882a593Smuzhiyun - "ralink,mt7621-spi": for mt7621/mt7628/mt7688 platforms 6*4882a593Smuzhiyun- #address-cells: should be 1. 7*4882a593Smuzhiyun- #size-cells: should be 0. 8*4882a593Smuzhiyun- reg: Address and length of the register set for the device 9*4882a593Smuzhiyun- resets: phandle to the reset controller asserting this device in 10*4882a593Smuzhiyun reset 11*4882a593Smuzhiyun See ../reset/reset.txt for details. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional properties: 14*4882a593Smuzhiyun- cs-gpios: see spi-bus.txt. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- SoC Specific Portion: 19*4882a593Smuzhiyunspi0: spi@b00 { 20*4882a593Smuzhiyun compatible = "ralink,mt7621-spi"; 21*4882a593Smuzhiyun reg = <0xb00 0x100>; 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <0>; 24*4882a593Smuzhiyun resets = <&rstctrl 18>; 25*4882a593Smuzhiyun reset-names = "spi"; 26*4882a593Smuzhiyun}; 27