1*4882a593SmuzhiyunBinding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. 5*4882a593Smuzhiyun- reg: Base address and size of the controllers memory area 6*4882a593Smuzhiyun- clocks: phandle of the AHB clock. 7*4882a593Smuzhiyun- clock-names: has to be "ahb". 8*4882a593Smuzhiyun- #address-cells: <1>, as required by generic SPI binding. 9*4882a593Smuzhiyun- #size-cells: <0>, also as required by generic SPI binding. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunChild nodes as per the generic SPI binding. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun spi@1f000000 { 16*4882a593Smuzhiyun compatible = "qca,ar9132-spi", "qca,ar7100-spi"; 17*4882a593Smuzhiyun reg = <0x1f000000 0x10>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun clocks = <&pll 2>; 20*4882a593Smuzhiyun clock-names = "ahb"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <0>; 24*4882a593Smuzhiyun }; 25