1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/socionext,uniphier-spi.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Socionext UniPhier SPI controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: | 10*4882a593Smuzhiyun UniPhier SoCs have SCSSI which supports SPI single channel. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunmaintainers: 13*4882a593Smuzhiyun - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 14*4882a593Smuzhiyun - Keiji Hayashibara <hayashibara.keiji@socionext.com> 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunallOf: 17*4882a593Smuzhiyun - $ref: spi-controller.yaml# 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun "#address-cells": true 21*4882a593Smuzhiyun "#size-cells": true 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun const: socionext,uniphier-scssi 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun interrupts: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clocks: 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun resets: 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunrequired: 39*4882a593Smuzhiyun - compatible 40*4882a593Smuzhiyun - reg 41*4882a593Smuzhiyun - interrupts 42*4882a593Smuzhiyun - clocks 43*4882a593Smuzhiyun - resets 44*4882a593Smuzhiyun - "#address-cells" 45*4882a593Smuzhiyun - "#size-cells" 46*4882a593Smuzhiyun 47*4882a593SmuzhiyununevaluatedProperties: false 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunexamples: 50*4882a593Smuzhiyun - | 51*4882a593Smuzhiyun spi0: spi@54006000 { 52*4882a593Smuzhiyun compatible = "socionext,uniphier-scssi"; 53*4882a593Smuzhiyun reg = <0x54006000 0x100>; 54*4882a593Smuzhiyun #address-cells = <1>; 55*4882a593Smuzhiyun #size-cells = <0>; 56*4882a593Smuzhiyun interrupts = <0 39 4>; 57*4882a593Smuzhiyun clocks = <&peri_clk 11>; 58*4882a593Smuzhiyun resets = <&peri_rst 11>; 59*4882a593Smuzhiyun }; 60