xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Mark Brown <broonie@kernel.org>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: "spi-controller.yaml#"
14*4882a593Smuzhiyun  - if:
15*4882a593Smuzhiyun      properties:
16*4882a593Smuzhiyun        compatible:
17*4882a593Smuzhiyun          contains:
18*4882a593Smuzhiyun            enum:
19*4882a593Smuzhiyun              - mscc,ocelot-spi
20*4882a593Smuzhiyun              - mscc,jaguar2-spi
21*4882a593Smuzhiyun    then:
22*4882a593Smuzhiyun      properties:
23*4882a593Smuzhiyun        reg:
24*4882a593Smuzhiyun          minItems: 2
25*4882a593Smuzhiyun  - if:
26*4882a593Smuzhiyun      properties:
27*4882a593Smuzhiyun        compatible:
28*4882a593Smuzhiyun          contains:
29*4882a593Smuzhiyun            enum:
30*4882a593Smuzhiyun              - baikal,bt1-sys-ssi
31*4882a593Smuzhiyun    then:
32*4882a593Smuzhiyun      properties:
33*4882a593Smuzhiyun        mux-controls:
34*4882a593Smuzhiyun          maxItems: 1
35*4882a593Smuzhiyun      required:
36*4882a593Smuzhiyun        - mux-controls
37*4882a593Smuzhiyun    else:
38*4882a593Smuzhiyun      required:
39*4882a593Smuzhiyun        - interrupts
40*4882a593Smuzhiyun
41*4882a593Smuzhiyunproperties:
42*4882a593Smuzhiyun  compatible:
43*4882a593Smuzhiyun    oneOf:
44*4882a593Smuzhiyun      - description: Generic DW SPI Controller
45*4882a593Smuzhiyun        enum:
46*4882a593Smuzhiyun          - snps,dw-apb-ssi
47*4882a593Smuzhiyun          - snps,dwc-ssi-1.01a
48*4882a593Smuzhiyun      - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
49*4882a593Smuzhiyun        items:
50*4882a593Smuzhiyun          - enum:
51*4882a593Smuzhiyun              - mscc,ocelot-spi
52*4882a593Smuzhiyun              - mscc,jaguar2-spi
53*4882a593Smuzhiyun          - const: snps,dw-apb-ssi
54*4882a593Smuzhiyun      - description: Microchip Sparx5 SoC SPI Controller
55*4882a593Smuzhiyun        const: microchip,sparx5-spi
56*4882a593Smuzhiyun      - description: Amazon Alpine SPI Controller
57*4882a593Smuzhiyun        const: amazon,alpine-dw-apb-ssi
58*4882a593Smuzhiyun      - description: Renesas RZ/N1 SPI Controller
59*4882a593Smuzhiyun        items:
60*4882a593Smuzhiyun          - const: renesas,rzn1-spi
61*4882a593Smuzhiyun          - const: snps,dw-apb-ssi
62*4882a593Smuzhiyun      - description: Intel Keem Bay SPI Controller
63*4882a593Smuzhiyun        const: intel,keembay-ssi
64*4882a593Smuzhiyun      - description: Baikal-T1 SPI Controller
65*4882a593Smuzhiyun        const: baikal,bt1-ssi
66*4882a593Smuzhiyun      - description: Baikal-T1 System Boot SPI Controller
67*4882a593Smuzhiyun        const: baikal,bt1-sys-ssi
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun  reg:
70*4882a593Smuzhiyun    minItems: 1
71*4882a593Smuzhiyun    items:
72*4882a593Smuzhiyun      - description: DW APB SSI controller memory mapped registers
73*4882a593Smuzhiyun      - description: SPI MST region map or directly mapped SPI ROM
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun  interrupts:
76*4882a593Smuzhiyun    maxItems: 1
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun  clocks:
79*4882a593Smuzhiyun    minItems: 1
80*4882a593Smuzhiyun    items:
81*4882a593Smuzhiyun      - description: SPI Controller reference clock source
82*4882a593Smuzhiyun      - description: APB interface clock source
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun  clock-names:
85*4882a593Smuzhiyun    minItems: 1
86*4882a593Smuzhiyun    items:
87*4882a593Smuzhiyun      - const: ssi_clk
88*4882a593Smuzhiyun      - const: pclk
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun  resets:
91*4882a593Smuzhiyun    maxItems: 1
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun  reset-names:
94*4882a593Smuzhiyun    const: spi
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun  reg-io-width:
97*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
98*4882a593Smuzhiyun    description: I/O register width (in bytes) implemented by this device
99*4882a593Smuzhiyun    default: 4
100*4882a593Smuzhiyun    enum: [ 2, 4 ]
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun  num-cs:
103*4882a593Smuzhiyun    default: 4
104*4882a593Smuzhiyun    minimum: 1
105*4882a593Smuzhiyun    maximum: 4
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun  dmas:
108*4882a593Smuzhiyun    items:
109*4882a593Smuzhiyun      - description: TX DMA Channel
110*4882a593Smuzhiyun      - description: RX DMA Channel
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun  dma-names:
113*4882a593Smuzhiyun    items:
114*4882a593Smuzhiyun      - const: tx
115*4882a593Smuzhiyun      - const: rx
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun  rx-sample-delay-ns:
118*4882a593Smuzhiyun    default: 0
119*4882a593Smuzhiyun    description: Default value of the rx-sample-delay-ns property.
120*4882a593Smuzhiyun      This value will be used if the property is not explicitly defined
121*4882a593Smuzhiyun      for a SPI slave device. See below.
122*4882a593Smuzhiyun
123*4882a593SmuzhiyunpatternProperties:
124*4882a593Smuzhiyun  "^.*@[0-9a-f]+$":
125*4882a593Smuzhiyun    type: object
126*4882a593Smuzhiyun    properties:
127*4882a593Smuzhiyun      reg:
128*4882a593Smuzhiyun        minimum: 0
129*4882a593Smuzhiyun        maximum: 3
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun      spi-rx-bus-width:
132*4882a593Smuzhiyun        const: 1
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun      spi-tx-bus-width:
135*4882a593Smuzhiyun        const: 1
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun      rx-sample-delay-ns:
138*4882a593Smuzhiyun        description: SPI Rx sample delay offset, unit is nanoseconds.
139*4882a593Smuzhiyun          The delay from the default sample time before the actual
140*4882a593Smuzhiyun          sample of the rxd input signal occurs. The "rx_sample_delay"
141*4882a593Smuzhiyun          is an optional feature of the designware controller, and the
142*4882a593Smuzhiyun          upper limit is also subject to controller configuration.
143*4882a593Smuzhiyun
144*4882a593SmuzhiyununevaluatedProperties: false
145*4882a593Smuzhiyun
146*4882a593Smuzhiyunrequired:
147*4882a593Smuzhiyun  - compatible
148*4882a593Smuzhiyun  - reg
149*4882a593Smuzhiyun  - "#address-cells"
150*4882a593Smuzhiyun  - "#size-cells"
151*4882a593Smuzhiyun  - clocks
152*4882a593Smuzhiyun
153*4882a593Smuzhiyunexamples:
154*4882a593Smuzhiyun  - |
155*4882a593Smuzhiyun    spi@fff00000 {
156*4882a593Smuzhiyun      compatible = "snps,dw-apb-ssi";
157*4882a593Smuzhiyun      reg = <0xfff00000 0x1000>;
158*4882a593Smuzhiyun      #address-cells = <1>;
159*4882a593Smuzhiyun      #size-cells = <0>;
160*4882a593Smuzhiyun      interrupts = <0 154 4>;
161*4882a593Smuzhiyun      clocks = <&spi_m_clk>;
162*4882a593Smuzhiyun      num-cs = <2>;
163*4882a593Smuzhiyun      cs-gpios = <&gpio0 13 0>,
164*4882a593Smuzhiyun                 <&gpio0 14 0>;
165*4882a593Smuzhiyun      rx-sample-delay-ns = <3>;
166*4882a593Smuzhiyun      spi-flash@1 {
167*4882a593Smuzhiyun        compatible = "spi-nand";
168*4882a593Smuzhiyun        reg = <1>;
169*4882a593Smuzhiyun        rx-sample-delay-ns = <7>;
170*4882a593Smuzhiyun      };
171*4882a593Smuzhiyun    };
172*4882a593Smuzhiyun  - |
173*4882a593Smuzhiyun    spi@1f040100 {
174*4882a593Smuzhiyun      compatible = "baikal,bt1-sys-ssi";
175*4882a593Smuzhiyun      reg = <0x1f040100 0x900>,
176*4882a593Smuzhiyun            <0x1c000000 0x1000000>;
177*4882a593Smuzhiyun      #address-cells = <1>;
178*4882a593Smuzhiyun      #size-cells = <0>;
179*4882a593Smuzhiyun      mux-controls = <&boot_mux>;
180*4882a593Smuzhiyun      clocks = <&ccu_sys>;
181*4882a593Smuzhiyun      clock-names = "ssi_clk";
182*4882a593Smuzhiyun    };
183*4882a593Smuzhiyun...
184