xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/renesas,hspi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/renesas,hspi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Renesas HSPI
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Geert Uytterhoeven <geert+renesas@glider.be>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: spi-controller.yaml#
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    items:
18*4882a593Smuzhiyun      - enum:
19*4882a593Smuzhiyun          - renesas,hspi-r8a7778 # R-Car M1A
20*4882a593Smuzhiyun          - renesas,hspi-r8a7779 # R-Car H1
21*4882a593Smuzhiyun      - const: renesas,hspi
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun  reg:
24*4882a593Smuzhiyun    maxItems: 1
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun  interrupts:
27*4882a593Smuzhiyun    maxItems: 1
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  clocks:
30*4882a593Smuzhiyun    maxItems: 1
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  power-domains:
33*4882a593Smuzhiyun    maxItems: 1
34*4882a593Smuzhiyun
35*4882a593Smuzhiyunrequired:
36*4882a593Smuzhiyun  - compatible
37*4882a593Smuzhiyun  - reg
38*4882a593Smuzhiyun  - interrupts
39*4882a593Smuzhiyun  - clocks
40*4882a593Smuzhiyun  - '#address-cells'
41*4882a593Smuzhiyun  - '#size-cells'
42*4882a593Smuzhiyun
43*4882a593SmuzhiyununevaluatedProperties: false
44*4882a593Smuzhiyun
45*4882a593Smuzhiyunexamples:
46*4882a593Smuzhiyun  - |
47*4882a593Smuzhiyun    #include <dt-bindings/clock/r8a7778-clock.h>
48*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun    hspi0: spi@fffc7000 {
51*4882a593Smuzhiyun        compatible = "renesas,hspi-r8a7778", "renesas,hspi";
52*4882a593Smuzhiyun        reg = <0xfffc7000 0x18>;
53*4882a593Smuzhiyun        interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
54*4882a593Smuzhiyun        clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
55*4882a593Smuzhiyun        power-domains = <&cpg_clocks>;
56*4882a593Smuzhiyun        #address-cells = <1>;
57*4882a593Smuzhiyun        #size-cells = <0>;
58*4882a593Smuzhiyun    };
59*4882a593Smuzhiyun
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