1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/qca,ar934x-spi.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm Atheros AR934x/QCA95xx SoC SPI controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chuanhong Guo <gch981213@gmail.com> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: spi-controller.yaml# 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun const: qca,ar934x-spi 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun reg: 20*4882a593Smuzhiyun maxItems: 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun clocks: 23*4882a593Smuzhiyun maxItems: 1 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunrequired: 26*4882a593Smuzhiyun - compatible 27*4882a593Smuzhiyun - reg 28*4882a593Smuzhiyun - clocks 29*4882a593Smuzhiyun - '#address-cells' 30*4882a593Smuzhiyun - '#size-cells' 31*4882a593Smuzhiyun 32*4882a593SmuzhiyununevaluatedProperties: false 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunexamples: 35*4882a593Smuzhiyun - | 36*4882a593Smuzhiyun #include <dt-bindings/clock/ath79-clk.h> 37*4882a593Smuzhiyun spi: spi@1f000000 { 38*4882a593Smuzhiyun compatible = "qca,ar934x-spi"; 39*4882a593Smuzhiyun reg = <0x1f000000 0x1c>; 40*4882a593Smuzhiyun clocks = <&pll ATH79_CLK_AHB>; 41*4882a593Smuzhiyun #address-cells = <1>; 42*4882a593Smuzhiyun #size-cells = <0>; 43*4882a593Smuzhiyun }; 44