1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk> 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml# 6*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: PXA2xx SSP SPI Controller bindings 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Lubomir Rintel <lkundrak@v3.sk> 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunallOf: 14*4882a593Smuzhiyun - $ref: spi-controller.yaml# 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun const: marvell,mmp2-ssp 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun interrupts: 21*4882a593Smuzhiyun maxItems: 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun reg: 24*4882a593Smuzhiyun maxItems: 1 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clocks: 27*4882a593Smuzhiyun maxItems: 1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun ready-gpios: 30*4882a593Smuzhiyun description: | 31*4882a593Smuzhiyun GPIO used to signal a SPI master that the FIFO is filled and we're 32*4882a593Smuzhiyun ready to service a transfer. Only useful in slave mode. 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyunrequired: 36*4882a593Smuzhiyun - compatible 37*4882a593Smuzhiyun - reg 38*4882a593Smuzhiyun - interrupts 39*4882a593Smuzhiyun - clocks 40*4882a593Smuzhiyun 41*4882a593Smuzhiyundependencies: 42*4882a593Smuzhiyun ready-gpios: [ spi-slave ] 43*4882a593Smuzhiyun 44*4882a593SmuzhiyununevaluatedProperties: false 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunexamples: 47*4882a593Smuzhiyun - | 48*4882a593Smuzhiyun #include <dt-bindings/clock/marvell,mmp2.h> 49*4882a593Smuzhiyun spi@d4035000 { 50*4882a593Smuzhiyun compatible = "marvell,mmp2-ssp"; 51*4882a593Smuzhiyun #address-cells = <1>; 52*4882a593Smuzhiyun #size-cells = <0>; 53*4882a593Smuzhiyun reg = <0xd4035000 0x1000>; 54*4882a593Smuzhiyun clocks = <&soc_clocks MMP2_CLK_SSP0>; 55*4882a593Smuzhiyun interrupts = <0>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun... 59