1*4882a593Smuzhiyun* Energy Micro EFM32 SPI 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- #address-cells: see spi-bus.txt 5*4882a593Smuzhiyun- #size-cells: see spi-bus.txt 6*4882a593Smuzhiyun- compatible: should be "energymicro,efm32-spi" 7*4882a593Smuzhiyun- reg: Offset and length of the register set for the controller 8*4882a593Smuzhiyun- interrupts: pair specifying rx and tx irq 9*4882a593Smuzhiyun- clocks: phandle to the spi clock 10*4882a593Smuzhiyun- cs-gpios: see spi-bus.txt 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRecommended properties : 13*4882a593Smuzhiyun- energymicro,location: Value to write to the ROUTE register's LOCATION 14*4882a593Smuzhiyun bitfield to configure the pinmux for the device, see 15*4882a593Smuzhiyun datasheet for values. 16*4882a593Smuzhiyun If this property is not provided, keeping what is 17*4882a593Smuzhiyun already configured in the hardware, so its either the 18*4882a593Smuzhiyun reset default 0 or whatever the bootloader did. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunspi1: spi@4000c400 { /* USART1 */ 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <0>; 25*4882a593Smuzhiyun compatible = "energymicro,efm32-spi"; 26*4882a593Smuzhiyun reg = <0x4000c400 0x400>; 27*4882a593Smuzhiyun interrupts = <15 16>; 28*4882a593Smuzhiyun clocks = <&cmu 20>; 29*4882a593Smuzhiyun cs-gpios = <&gpio 51 1>; // D3 30*4882a593Smuzhiyun energymicro,location = <1>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun ks8851@0 { 33*4882a593Smuzhiyun compatible = "ks8851"; 34*4882a593Smuzhiyun spi-max-frequency = <6000000>; 35*4882a593Smuzhiyun reg = <0>; 36*4882a593Smuzhiyun interrupt-parent = <&boardfpga>; 37*4882a593Smuzhiyun interrupts = <4>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun}; 40