1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun# Copyright 2019 BayLibre, SAS 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#" 6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Amlogic Meson SPI Flash Controller 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Neil Armstrong <narmstrong@baylibre.com> 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunallOf: 14*4882a593Smuzhiyun - $ref: "spi-controller.yaml#" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyundescription: | 17*4882a593Smuzhiyun The Meson SPIFC is a controller optimized for communication with SPI 18*4882a593Smuzhiyun NOR memories, without DMA support and a 64-byte unified transmit / 19*4882a593Smuzhiyun receive buffer. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunproperties: 22*4882a593Smuzhiyun compatible: 23*4882a593Smuzhiyun enum: 24*4882a593Smuzhiyun - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs 25*4882a593Smuzhiyun - amlogic,meson-gxbb-spifc # SPI Flash Controller on GXBB and compatible SoCs 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun reg: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun clocks: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunrequired: 34*4882a593Smuzhiyun - compatible 35*4882a593Smuzhiyun - reg 36*4882a593Smuzhiyun - clocks 37*4882a593Smuzhiyun 38*4882a593SmuzhiyununevaluatedProperties: false 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunexamples: 41*4882a593Smuzhiyun - | 42*4882a593Smuzhiyun spi@c1108c80 { 43*4882a593Smuzhiyun compatible = "amlogic,meson6-spifc"; 44*4882a593Smuzhiyun reg = <0xc1108c80 0x80>; 45*4882a593Smuzhiyun clocks = <&clk81>; 46*4882a593Smuzhiyun #address-cells = <1>; 47*4882a593Smuzhiyun #size-cells = <0>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun flash: flash@0 { 50*4882a593Smuzhiyun compatible = "spansion,m25p80", "jedec,spi-nor"; 51*4882a593Smuzhiyun reg = <0>; 52*4882a593Smuzhiyun spi-max-frequency = <40000000>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56