xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A31 SPI Controller Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunallOf:
10*4882a593Smuzhiyun  - $ref: "spi-controller.yaml"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunmaintainers:
13*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
14*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  "#address-cells": true
18*4882a593Smuzhiyun  "#size-cells": true
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  compatible:
21*4882a593Smuzhiyun    oneOf:
22*4882a593Smuzhiyun      - const: allwinner,sun6i-a31-spi
23*4882a593Smuzhiyun      - const: allwinner,sun8i-h3-spi
24*4882a593Smuzhiyun      - items:
25*4882a593Smuzhiyun          - enum:
26*4882a593Smuzhiyun              - allwinner,sun8i-r40-spi
27*4882a593Smuzhiyun              - allwinner,sun50i-h6-spi
28*4882a593Smuzhiyun          - const: allwinner,sun8i-h3-spi
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  reg:
31*4882a593Smuzhiyun    maxItems: 1
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun  interrupts:
34*4882a593Smuzhiyun    maxItems: 1
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  clocks:
37*4882a593Smuzhiyun    items:
38*4882a593Smuzhiyun      - description: Bus Clock
39*4882a593Smuzhiyun      - description: Module Clock
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun  clock-names:
42*4882a593Smuzhiyun    items:
43*4882a593Smuzhiyun      - const: ahb
44*4882a593Smuzhiyun      - const: mod
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  resets:
47*4882a593Smuzhiyun    maxItems: 1
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  dmas:
50*4882a593Smuzhiyun    items:
51*4882a593Smuzhiyun      - description: RX DMA Channel
52*4882a593Smuzhiyun      - description: TX DMA Channel
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun  dma-names:
55*4882a593Smuzhiyun    items:
56*4882a593Smuzhiyun      - const: rx
57*4882a593Smuzhiyun      - const: tx
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun  num-cs: true
60*4882a593Smuzhiyun
61*4882a593SmuzhiyunpatternProperties:
62*4882a593Smuzhiyun  "^.*@[0-9a-f]+":
63*4882a593Smuzhiyun    type: object
64*4882a593Smuzhiyun    properties:
65*4882a593Smuzhiyun      reg:
66*4882a593Smuzhiyun        items:
67*4882a593Smuzhiyun          minimum: 0
68*4882a593Smuzhiyun          maximum: 4
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun      spi-rx-bus-width:
71*4882a593Smuzhiyun        const: 1
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun      spi-tx-bus-width:
74*4882a593Smuzhiyun        const: 1
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunrequired:
77*4882a593Smuzhiyun  - compatible
78*4882a593Smuzhiyun  - reg
79*4882a593Smuzhiyun  - interrupts
80*4882a593Smuzhiyun  - clocks
81*4882a593Smuzhiyun  - clock-names
82*4882a593Smuzhiyun
83*4882a593SmuzhiyunadditionalProperties: false
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunexamples:
86*4882a593Smuzhiyun  - |
87*4882a593Smuzhiyun    spi1: spi@1c69000 {
88*4882a593Smuzhiyun        compatible = "allwinner,sun6i-a31-spi";
89*4882a593Smuzhiyun        reg = <0x01c69000 0x1000>;
90*4882a593Smuzhiyun        interrupts = <0 66 4>;
91*4882a593Smuzhiyun        clocks = <&ahb1_gates 21>, <&spi1_clk>;
92*4882a593Smuzhiyun        clock-names = "ahb", "mod";
93*4882a593Smuzhiyun        resets = <&ahb1_rst 21>;
94*4882a593Smuzhiyun        #address-cells = <1>;
95*4882a593Smuzhiyun        #size-cells = <0>;
96*4882a593Smuzhiyun    };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun  - |
99*4882a593Smuzhiyun    spi0: spi@1c68000 {
100*4882a593Smuzhiyun        compatible = "allwinner,sun8i-h3-spi";
101*4882a593Smuzhiyun        reg = <0x01c68000 0x1000>;
102*4882a593Smuzhiyun        interrupts = <0 65 4>;
103*4882a593Smuzhiyun        clocks = <&ccu 30>, <&ccu 82>;
104*4882a593Smuzhiyun        clock-names = "ahb", "mod";
105*4882a593Smuzhiyun        dmas = <&dma 23>, <&dma 23>;
106*4882a593Smuzhiyun        dma-names = "rx", "tx";
107*4882a593Smuzhiyun        resets = <&ccu 15>;
108*4882a593Smuzhiyun        #address-cells = <1>;
109*4882a593Smuzhiyun        #size-cells = <0>;
110*4882a593Smuzhiyun    };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun...
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