1*4882a593SmuzhiyunWM1811/WM8994/WM8958 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThese devices support both I2C and SPI (configured with pin strapping 4*4882a593Smuzhiyunon the board). 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958". 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun - reg : the I2C address of the device for I2C, the chip select 11*4882a593Smuzhiyun number for SPI. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun - gpio-controller : Indicates this device is a GPIO controller. 14*4882a593Smuzhiyun - #gpio-cells : Must be 2. The first cell is the pin number and the 15*4882a593Smuzhiyun second cell is used to specify optional parameters (currently unused). 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun - power supplies for the device, as covered in 18*4882a593Smuzhiyun Documentation/devicetree/bindings/regulator/regulator.txt, depending 19*4882a593Smuzhiyun on compatible: 20*4882a593Smuzhiyun - for wlf,wm1811 and wlf,wm8958: 21*4882a593Smuzhiyun AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, 22*4882a593Smuzhiyun DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply 23*4882a593Smuzhiyun - for wlf,wm8994: 24*4882a593Smuzhiyun AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply, 25*4882a593Smuzhiyun SPKVDD1-supply, SPKVDD2-supply 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunOptional properties: 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun - interrupts : The interrupt line the IRQ signal for the device is 30*4882a593Smuzhiyun connected to. This is optional, if it is not connected then none 31*4882a593Smuzhiyun of the interrupt related properties should be specified. 32*4882a593Smuzhiyun - interrupt-controller : These devices contain interrupt controllers 33*4882a593Smuzhiyun and may provide interrupt services to other devices if they have an 34*4882a593Smuzhiyun interrupt line connected. 35*4882a593Smuzhiyun - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. 36*4882a593Smuzhiyun The first cell is the IRQ number. 37*4882a593Smuzhiyun The second cell is the flags, encoded as the trigger masks from 38*4882a593Smuzhiyun Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun - clocks : A list of up to two phandle and clock specifier pairs 41*4882a593Smuzhiyun - clock-names : A list of clock names sorted in the same order as clocks. 42*4882a593Smuzhiyun Valid clock names are "MCLK1" and "MCLK2". 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun - wlf,gpio-cfg : A list of GPIO configuration register values. If absent, 45*4882a593Smuzhiyun no configuration of these registers is performed. If any value is 46*4882a593Smuzhiyun over 0xffff then the register will be left as default. If present 11 47*4882a593Smuzhiyun values must be supplied. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun - wlf,micbias-cfg : Two MICBIAS register values for WM1811 or 50*4882a593Smuzhiyun WM8958. If absent the register defaults will be used. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun - wlf,ldo1ena : GPIO specifier for control of LDO1ENA input to device. 53*4882a593Smuzhiyun - wlf,ldo2ena : GPIO specifier for control of LDO2ENA input to device. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun - wlf,lineout1-se : If present LINEOUT1 is in single ended mode. 56*4882a593Smuzhiyun - wlf,lineout2-se : If present LINEOUT2 is in single ended mode. 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun - wlf,lineout1-feedback : If present LINEOUT1 has common mode feedback 59*4882a593Smuzhiyun connected. 60*4882a593Smuzhiyun - wlf,lineout2-feedback : If present LINEOUT2 has common mode feedback 61*4882a593Smuzhiyun connected. 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun - wlf,ldoena-always-driven : If present LDOENA is always driven. 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun - wlf,spkmode-pu : If present enable the internal pull-up resistor on 66*4882a593Smuzhiyun the SPKMODE pin. 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun - wlf,csnaddr-pd : If present enable the internal pull-down resistor on 69*4882a593Smuzhiyun the CS/ADDR pin. 70*4882a593Smuzhiyun 71*4882a593SmuzhiyunPins on the device (for linking into audio routes): 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun * IN1LN 74*4882a593Smuzhiyun * IN1LP 75*4882a593Smuzhiyun * IN2LN 76*4882a593Smuzhiyun * IN2LP:VXRN 77*4882a593Smuzhiyun * IN1RN 78*4882a593Smuzhiyun * IN1RP 79*4882a593Smuzhiyun * IN2RN 80*4882a593Smuzhiyun * IN2RP:VXRP 81*4882a593Smuzhiyun * SPKOUTLP 82*4882a593Smuzhiyun * SPKOUTLN 83*4882a593Smuzhiyun * SPKOUTRP 84*4882a593Smuzhiyun * SPKOUTRN 85*4882a593Smuzhiyun * HPOUT1L 86*4882a593Smuzhiyun * HPOUT1R 87*4882a593Smuzhiyun * HPOUT2P 88*4882a593Smuzhiyun * HPOUT2N 89*4882a593Smuzhiyun * LINEOUT1P 90*4882a593Smuzhiyun * LINEOUT1N 91*4882a593Smuzhiyun * LINEOUT2P 92*4882a593Smuzhiyun * LINEOUT2N 93*4882a593Smuzhiyun 94*4882a593SmuzhiyunExample: 95*4882a593Smuzhiyun 96*4882a593Smuzhiyunwm8994: codec@1a { 97*4882a593Smuzhiyun compatible = "wlf,wm8994"; 98*4882a593Smuzhiyun reg = <0x1a>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun gpio-controller; 101*4882a593Smuzhiyun #gpio-cells = <2>; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun lineout1-se; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun AVDD1-supply = <®ulator>; 106*4882a593Smuzhiyun AVDD2-supply = <®ulator>; 107*4882a593Smuzhiyun CPVDD-supply = <®ulator>; 108*4882a593Smuzhiyun DBVDD-supply = <®ulator>; 109*4882a593Smuzhiyun DCVDD-supply = <®ulator>; 110*4882a593Smuzhiyun SPKVDD1-supply = <®ulator>; 111*4882a593Smuzhiyun SPKVDD2-supply = <®ulator>; 112*4882a593Smuzhiyun}; 113