xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/wm8960.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunWM8960 audio CODEC
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis device supports I2C only.
4*4882a593Smuzhiyun
5*4882a593SmuzhiyunRequired properties:
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun  - compatible : "wlf,wm8960"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun  - reg : the I2C address of the device.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunOptional properties:
12*4882a593Smuzhiyun  - wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of
13*4882a593Smuzhiyun	R24 (Additional control 2) gets set, indicating that ADCLRC and DACLRC pins
14*4882a593Smuzhiyun	will be disabled only when ADC (Left and Right) and DAC (Left and Right)
15*4882a593Smuzhiyun	are disabled.
16*4882a593Smuzhiyun	When wm8960 works on synchronize mode and DACLRC pin is used to supply
17*4882a593Smuzhiyun	frame clock, it will no frame clock for captrue unless enable DAC to enable
18*4882a593Smuzhiyun	DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue.
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  - wlf,capless: This is a boolean property. If present, OUT3 pin will be
21*4882a593Smuzhiyun	enabled and disabled together with HP_L and HP_R pins in response to jack
22*4882a593Smuzhiyun	detect events.
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  - wlf,hp-cfg: A list of headphone jack detect configuration register values.
25*4882a593Smuzhiyun		The list must be 3 entries long.
26*4882a593Smuzhiyun		hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
27*4882a593Smuzhiyun		hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
28*4882a593Smuzhiyun		hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  - wlf,gpio-cfg: A list of GPIO configuration register values.
31*4882a593Smuzhiyun		  The list must be 2 entries long.
32*4882a593Smuzhiyun		  gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)
33*4882a593Smuzhiyun		  gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
34*4882a593Smuzhiyun
35*4882a593SmuzhiyunExample:
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunwm8960: codec@1a {
38*4882a593Smuzhiyun	compatible = "wlf,wm8960";
39*4882a593Smuzhiyun	reg = <0x1a>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	wlf,shared-lrclk;
42*4882a593Smuzhiyun};
43