1*4882a593SmuzhiyunTexas Instruments - tas2552 Codec module 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe tas2552 serial control bus communicates through I2C protocols 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun - compatible - One of: 7*4882a593Smuzhiyun "ti,tas2552" - TAS2552 8*4882a593Smuzhiyun - reg - I2C slave address: it can be 0x40 if ADDR pin is 0 9*4882a593Smuzhiyun or 0x41 if ADDR pin is 1. 10*4882a593Smuzhiyun - supply-*: Required supply regulators are: 11*4882a593Smuzhiyun "vbat" battery voltage 12*4882a593Smuzhiyun "iovdd" I/O Voltage 13*4882a593Smuzhiyun "avdd" Analog DAC Voltage 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun - enable-gpio - gpio pin to enable/disable the device 17*4882a593Smuzhiyun 18*4882a593Smuzhiyuntas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the 19*4882a593Smuzhiyuninternal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, the PDM 20*4882a593Smuzhiyunreference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK. 21*4882a593SmuzhiyunFor system integration the dt-bindings/sound/tas2552.h header file provides 22*4882a593Smuzhiyundefined values to select and configure the PLL and PDM reference clocks. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunExample: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyuntas2552: tas2552@41 { 27*4882a593Smuzhiyun compatible = "ti,tas2552"; 28*4882a593Smuzhiyun reg = <0x41>; 29*4882a593Smuzhiyun vbat-supply = <®_vbat>; 30*4882a593Smuzhiyun iovdd-supply = <®_iovdd>; 31*4882a593Smuzhiyun avdd-supply = <®_avdd>; 32*4882a593Smuzhiyun enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; 33*4882a593Smuzhiyun}; 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunFor more product information please see the link below: 36*4882a593Smuzhiyunhttps://www.ti.com/product/TAS2552 37