xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/st,stm32-sai.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunSTMicroelectronics STM32 Serial Audio Interface (SAI).
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe SAI interface (Serial Audio Interface) offers a wide set of audio protocols
4*4882a593Smuzhiyunas I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
5*4882a593SmuzhiyunThe SAI contains two independent audio sub-blocks. Each sub-block has
6*4882a593Smuzhiyunits own clock generator and I/O lines controller.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired properties:
9*4882a593Smuzhiyun  - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
10*4882a593Smuzhiyun  - reg: Base address and size of SAI common register set.
11*4882a593Smuzhiyun  - clocks: Must contain phandle and clock specifier pairs for each entry
12*4882a593Smuzhiyun	in clock-names.
13*4882a593Smuzhiyun  - clock-names: Must contain "pclk" "x8k" and "x11k"
14*4882a593Smuzhiyun	"pclk": Clock which feeds the peripheral bus interface.
15*4882a593Smuzhiyun	        Mandatory for "st,stm32h7-sai" compatible.
16*4882a593Smuzhiyun	        Not used for "st,stm32f4-sai" compatible.
17*4882a593Smuzhiyun	"x8k": SAI parent clock for sampling rates multiple of 8kHz.
18*4882a593Smuzhiyun	"x11k": SAI parent clock for sampling rates multiple of 11.025kHz.
19*4882a593Smuzhiyun  - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunOptional properties:
22*4882a593Smuzhiyun  - resets: Reference to a reset controller asserting the SAI
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunSAI subnodes:
25*4882a593SmuzhiyunTwo subnodes corresponding to SAI sub-block instances A et B can be defined.
26*4882a593SmuzhiyunSubnode can be omitted for unsused sub-block.
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunSAI subnodes required properties:
29*4882a593Smuzhiyun  - compatible: Should be "st,stm32-sai-sub-a" or "st,stm32-sai-sub-b"
30*4882a593Smuzhiyun	for SAI sub-block A or B respectively.
31*4882a593Smuzhiyun  - reg: Base address and size of SAI sub-block register set.
32*4882a593Smuzhiyun  - clocks: Must contain one phandle and clock specifier pair
33*4882a593Smuzhiyun	for sai_ck which feeds the internal clock generator.
34*4882a593Smuzhiyun	If the SAI shares a master clock, with another SAI set as MCLK
35*4882a593Smuzhiyun	clock provider, SAI provider phandle must be specified here.
36*4882a593Smuzhiyun  - clock-names: Must contain "sai_ck".
37*4882a593Smuzhiyun	Must also contain "MCLK", if SAI shares a master clock,
38*4882a593Smuzhiyun	with a SAI set as MCLK clock provider.
39*4882a593Smuzhiyun  - dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml
40*4882a593Smuzhiyun  - dma-names: identifier string for each DMA request line
41*4882a593Smuzhiyun	"tx": if sai sub-block is configured as playback DAI
42*4882a593Smuzhiyun	"rx": if sai sub-block is configured as capture DAI
43*4882a593Smuzhiyun  - pinctrl-names: should contain only value "default"
44*4882a593Smuzhiyun  - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
45*4882a593Smuzhiyun
46*4882a593SmuzhiyunSAI subnodes Optional properties:
47*4882a593Smuzhiyun  - st,sync: specify synchronization mode.
48*4882a593Smuzhiyun	By default SAI sub-block is in asynchronous mode.
49*4882a593Smuzhiyun	This property sets SAI sub-block as slave of another SAI sub-block.
50*4882a593Smuzhiyun	Must contain the phandle and index of the sai sub-block providing
51*4882a593Smuzhiyun	the synchronization.
52*4882a593Smuzhiyun  - st,iec60958: support S/PDIF IEC6958 protocol for playback
53*4882a593Smuzhiyun	IEC60958 protocol is not available for capture.
54*4882a593Smuzhiyun	By default, custom protocol is assumed, meaning that protocol is
55*4882a593Smuzhiyun	configured according to protocol defined in related DAI link node,
56*4882a593Smuzhiyun	such as i2s, left justified, right justified, dsp and pdm protocols.
57*4882a593Smuzhiyun	Note: ac97 protocol is not supported by SAI driver
58*4882a593Smuzhiyun   - #clock-cells: should be 0. This property must be present if the SAI device
59*4882a593Smuzhiyun	is a master clock provider, according to clocks bindings, described in
60*4882a593Smuzhiyun	Documentation/devicetree/bindings/clock/clock-bindings.txt.
61*4882a593Smuzhiyun
62*4882a593SmuzhiyunThe device node should contain one 'port' child node with one child 'endpoint'
63*4882a593Smuzhiyunnode, according to the bindings defined in Documentation/devicetree/bindings/
64*4882a593Smuzhiyungraph.txt.
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunExample:
67*4882a593Smuzhiyunsound_card {
68*4882a593Smuzhiyun	compatible = "audio-graph-card";
69*4882a593Smuzhiyun	dais = <&sai1b_port>;
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyunsai1: sai1@40015800 {
73*4882a593Smuzhiyun	compatible = "st,stm32h7-sai";
74*4882a593Smuzhiyun	#address-cells = <1>;
75*4882a593Smuzhiyun	#size-cells = <1>;
76*4882a593Smuzhiyun	ranges = <0 0x40015800 0x400>;
77*4882a593Smuzhiyun	reg = <0x40015800 0x4>;
78*4882a593Smuzhiyun	clocks = <&rcc SAI1_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>;
79*4882a593Smuzhiyun	clock-names = "pclk", "x8k", "x11k";
80*4882a593Smuzhiyun	interrupts = <87>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	sai1a: audio-controller@40015804 {
83*4882a593Smuzhiyun		compatible = "st,stm32-sai-sub-a";
84*4882a593Smuzhiyun		reg = <0x4 0x1C>;
85*4882a593Smuzhiyun		clocks = <&rcc SAI1_CK>;
86*4882a593Smuzhiyun		clock-names = "sai_ck";
87*4882a593Smuzhiyun		dmas = <&dmamux1 1 87 0x400 0x0>;
88*4882a593Smuzhiyun		dma-names = "tx";
89*4882a593Smuzhiyun		pinctrl-names = "default";
90*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_sai1a>;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		sai1b_port: port {
93*4882a593Smuzhiyun			cpu_endpoint: endpoint {
94*4882a593Smuzhiyun				remote-endpoint = <&codec_endpoint>;
95*4882a593Smuzhiyun				format = "i2s";
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyunaudio-codec {
102*4882a593Smuzhiyun	codec_port: port {
103*4882a593Smuzhiyun		codec_endpoint: endpoint {
104*4882a593Smuzhiyun			remote-endpoint = <&cpu_endpoint>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun};
108