1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: STMicroelectronics STM32 SPI/I2S Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Olivier Moysan <olivier.moysan@st.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode. 14*4882a593Smuzhiyun Only some SPI instances support I2S. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun enum: 19*4882a593Smuzhiyun - st,stm32h7-i2s 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun "#sound-dai-cells": 22*4882a593Smuzhiyun const: 0 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks: 28*4882a593Smuzhiyun items: 29*4882a593Smuzhiyun - description: clock feeding the peripheral bus interface. 30*4882a593Smuzhiyun - description: clock feeding the internal clock generator. 31*4882a593Smuzhiyun - description: I2S parent clock for sampling rates multiple of 8kHz. 32*4882a593Smuzhiyun - description: I2S parent clock for sampling rates multiple of 11.025kHz. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clock-names: 35*4882a593Smuzhiyun items: 36*4882a593Smuzhiyun - const: pclk 37*4882a593Smuzhiyun - const: i2sclk 38*4882a593Smuzhiyun - const: x8k 39*4882a593Smuzhiyun - const: x11k 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun interrupts: 42*4882a593Smuzhiyun maxItems: 1 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun dmas: 45*4882a593Smuzhiyun items: 46*4882a593Smuzhiyun - description: audio capture DMA. 47*4882a593Smuzhiyun - description: audio playback DMA. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun dma-names: 50*4882a593Smuzhiyun items: 51*4882a593Smuzhiyun - const: rx 52*4882a593Smuzhiyun - const: tx 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun resets: 55*4882a593Smuzhiyun maxItems: 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyunrequired: 58*4882a593Smuzhiyun - compatible 59*4882a593Smuzhiyun - "#sound-dai-cells" 60*4882a593Smuzhiyun - reg 61*4882a593Smuzhiyun - clocks 62*4882a593Smuzhiyun - clock-names 63*4882a593Smuzhiyun - interrupts 64*4882a593Smuzhiyun - dmas 65*4882a593Smuzhiyun - dma-names 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunadditionalProperties: false 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunexamples: 70*4882a593Smuzhiyun - | 71*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 72*4882a593Smuzhiyun #include <dt-bindings/clock/stm32mp1-clks.h> 73*4882a593Smuzhiyun i2s2: audio-controller@4000b000 { 74*4882a593Smuzhiyun compatible = "st,stm32h7-i2s"; 75*4882a593Smuzhiyun #sound-dai-cells = <0>; 76*4882a593Smuzhiyun reg = <0x4000b000 0x400>; 77*4882a593Smuzhiyun clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; 78*4882a593Smuzhiyun clock-names = "pclk", "i2sclk", "x8k", "x11k"; 79*4882a593Smuzhiyun interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 80*4882a593Smuzhiyun dmas = <&dmamux1 39 0x400 0x01>, 81*4882a593Smuzhiyun <&dmamux1 40 0x400 0x01>; 82*4882a593Smuzhiyun dma-names = "rx", "tx"; 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun pinctrl-0 = <&i2s2_pins_a>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun... 88