1*4882a593Smuzhiyun* SiRF SoC audio port 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "sirf,audio-port" 5*4882a593Smuzhiyun- reg: Base address and size entries: 6*4882a593Smuzhiyun- dmas: List of DMA controller phandle and DMA request line ordered pairs. 7*4882a593Smuzhiyun- dma-names: Identifier string for each DMA request line in the dmas property. 8*4882a593Smuzhiyun These strings correspond 1:1 with the ordered pairs in dmas. 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun One of the DMA channels will be responsible for transmission (should be 11*4882a593Smuzhiyun named "tx") and one for reception (should be named "rx"). 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunaudioport: audioport@b0040000 { 16*4882a593Smuzhiyun compatible = "sirf,audio-port"; 17*4882a593Smuzhiyun reg = <0xb0040000 0x10000>; 18*4882a593Smuzhiyun dmas = <&dmac1 3>, <&dmac1 8>; 19*4882a593Smuzhiyun dma-names = "rx", "tx"; 20*4882a593Smuzhiyun}; 21