1*4882a593SmuzhiyunRT5660 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis device supports I2C only. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- compatible : "realtek,rt5660". 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- reg : The I2C address of the device. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOptional properties: 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- clocks: The phandle of the master clock to the CODEC 14*4882a593Smuzhiyun- clock-names: Should be "mclk" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- realtek,in1-differential 17*4882a593Smuzhiyun- realtek,in3-differential 18*4882a593Smuzhiyun Boolean. Indicate MIC1/3 input are differential, rather than single-ended. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- realtek,poweroff-in-suspend 21*4882a593Smuzhiyun Boolean. If the codec will be powered off in suspend, the resume should be 22*4882a593Smuzhiyun added delay time for waiting codec power ready. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- realtek,dmic1-data-pin 25*4882a593Smuzhiyun 0: dmic1 is not used 26*4882a593Smuzhiyun 1: using GPIO2 pin as dmic1 data pin 27*4882a593Smuzhiyun 2: using IN1P pin as dmic1 data pin 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunPins on the device (for linking into audio routes) for RT5660: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun * DMIC L1 32*4882a593Smuzhiyun * DMIC R1 33*4882a593Smuzhiyun * IN1P 34*4882a593Smuzhiyun * IN1N 35*4882a593Smuzhiyun * IN2P 36*4882a593Smuzhiyun * IN3P 37*4882a593Smuzhiyun * IN3N 38*4882a593Smuzhiyun * SPO 39*4882a593Smuzhiyun * LOUTL 40*4882a593Smuzhiyun * LOUTR 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunExample: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunrt5660 { 45*4882a593Smuzhiyun compatible = "realtek,rt5660"; 46*4882a593Smuzhiyun reg = <0x1c>; 47*4882a593Smuzhiyun}; 48