1*4882a593SmuzhiyunRT5514 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis device supports both I2C and SPI. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- compatible : "realtek,rt5514". 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- reg : the I2C address of the device for I2C, the chip select 10*4882a593Smuzhiyun number for SPI. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- clocks: The phandle of the master clock to the CODEC 15*4882a593Smuzhiyun- clock-names: Should be "mclk" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- interrupts: The interrupt number to the cpu. The interrupt specifier format 18*4882a593Smuzhiyun depends on the interrupt controller. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- realtek,dmic-init-delay-ms 21*4882a593Smuzhiyun Set the DMIC initial delay (ms) to wait it ready for I2C. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunPins on the device (for linking into audio routes) for I2C: 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun * DMIC1L 26*4882a593Smuzhiyun * DMIC1R 27*4882a593Smuzhiyun * DMIC2L 28*4882a593Smuzhiyun * DMIC2R 29*4882a593Smuzhiyun * AMICL 30*4882a593Smuzhiyun * AMICR 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunExample: 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunrt5514: codec@57 { 35*4882a593Smuzhiyun compatible = "realtek,rt5514"; 36*4882a593Smuzhiyun reg = <0x57>; 37*4882a593Smuzhiyun}; 38