1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/rockchip,rk3328-codec.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Rockchip rk3328 internal codec 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Heiko Stuebner <heiko@sntech.de> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun const: rockchip,rk3328-codec 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reg: 17*4882a593Smuzhiyun maxItems: 1 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun clocks: 20*4882a593Smuzhiyun items: 21*4882a593Smuzhiyun - description: clock for audio codec 22*4882a593Smuzhiyun - description: clock for I2S master clock 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun clock-names: 25*4882a593Smuzhiyun items: 26*4882a593Smuzhiyun - const: pclk 27*4882a593Smuzhiyun - const: mclk 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun rockchip,grf: 30*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 31*4882a593Smuzhiyun description: 32*4882a593Smuzhiyun The phandle of the syscon node for the GRF register. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun spk-depop-time-ms: 35*4882a593Smuzhiyun default: 200 36*4882a593Smuzhiyun description: 37*4882a593Smuzhiyun Speaker depop time in msec. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun mute-gpios: 40*4882a593Smuzhiyun maxItems: 1 41*4882a593Smuzhiyun description: 42*4882a593Smuzhiyun GPIO specifier for external line driver control (typically the 43*4882a593Smuzhiyun dedicated GPIO_MUTE pin) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun "#sound-dai-cells": 46*4882a593Smuzhiyun const: 0 47*4882a593Smuzhiyun 48*4882a593Smuzhiyunrequired: 49*4882a593Smuzhiyun - compatible 50*4882a593Smuzhiyun - reg 51*4882a593Smuzhiyun - clocks 52*4882a593Smuzhiyun - clock-names 53*4882a593Smuzhiyun - rockchip,grf 54*4882a593Smuzhiyun - "#sound-dai-cells" 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunadditionalProperties: false 57*4882a593Smuzhiyun 58*4882a593Smuzhiyunexamples: 59*4882a593Smuzhiyun - | 60*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 61*4882a593Smuzhiyun #include <dt-bindings/clock/rk3328-cru.h> 62*4882a593Smuzhiyun codec: codec@ff410000 { 63*4882a593Smuzhiyun compatible = "rockchip,rk3328-codec"; 64*4882a593Smuzhiyun reg = <0xff410000 0x1000>; 65*4882a593Smuzhiyun clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; 66*4882a593Smuzhiyun clock-names = "pclk", "mclk"; 67*4882a593Smuzhiyun rockchip,grf = <&grf>; 68*4882a593Smuzhiyun mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; 69*4882a593Smuzhiyun spk-depop-time-ms = <100>; 70*4882a593Smuzhiyun #sound-dai-cells = <0>; 71*4882a593Smuzhiyun }; 72