1*4882a593Smuzhiyun* Rockchip Rk3328 internal codec 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible: "rockchip,rk3328-codec" 6*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 7*4882a593Smuzhiyun region. 8*4882a593Smuzhiyun- rockchip,grf: the phandle of the syscon node for GRF register. 9*4882a593Smuzhiyun- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. 10*4882a593Smuzhiyun- clock-names: should be "pclk". 11*4882a593Smuzhiyun- spk-depop-time-ms: speak depop time msec. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample for rk3328 internal codec: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyuncodec: codec@ff410000 { 16*4882a593Smuzhiyun compatible = "rockchip,rk3328-codec"; 17*4882a593Smuzhiyun reg = <0x0 0xff410000 0x0 0x1000>; 18*4882a593Smuzhiyun rockchip,grf = <&grf>; 19*4882a593Smuzhiyun clocks = <&cru PCLK_ACODEC>; 20*4882a593Smuzhiyun clock-names = "pclk"; 21*4882a593Smuzhiyun spk-depop-time-ms = 100; 22*4882a593Smuzhiyun status = "disabled"; 23*4882a593Smuzhiyun}; 24