xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/rockchip,codec-digital.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Rockchip Codec Digital Interface
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun- compatible: should be one of the following
6*4882a593Smuzhiyun   - "rockchip,codec-digital-v1"
7*4882a593Smuzhiyun   - "rockchip,rk3568-codec-digital"
8*4882a593Smuzhiyun   - "rockchip,rk3588-codec-digital"
9*4882a593Smuzhiyun   - "rockchip,rv1106-codec-digital"
10*4882a593Smuzhiyun   - "rockchip,rv1126-codec-digital"
11*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped
12*4882a593Smuzhiyun  region.
13*4882a593Smuzhiyun- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
14*4882a593Smuzhiyun- clock-names: clock names.
15*4882a593Smuzhiyun- rockchip,bclk-fs: configure the bclk fs.
16*4882a593Smuzhiyun- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
17*4882a593Smuzhiyun- reset-names: reset names, should include "reset".
18*4882a593Smuzhiyun- rockchip,grf: the phandle of the syscon node for GRF register.
19*4882a593Smuzhiyun
20*4882a593SmuzhiyunOptional properties:
21*4882a593Smuzhiyun- rockchip,clk-sync-mode: This is a boolean property, if present, using clk
22*4882a593Smuzhiyun  sync mode.
23*4882a593Smuzhiyun- rockchip,pwm-output-mode: This is a boolean property, if present, output pwm
24*4882a593Smuzhiyun  to drive spk.
25*4882a593Smuzhiyun
26*4882a593SmuzhiyunExample:
27*4882a593Smuzhiyun
28*4882a593Smuzhiyunrkacdc_dig: codec-digital@ff850000 {
29*4882a593Smuzhiyun	compatible = "rockchip,codec-digital-v1";
30*4882a593Smuzhiyun	reg = <0xff850000 0x1000>;
31*4882a593Smuzhiyun	clocks = <&cru CLK_ACDCDIG_ADC>, <&cru CLK_ACDCDIG_DAC>,
32*4882a593Smuzhiyun		 <&cru PCLK_ACDCDIG>;
33*4882a593Smuzhiyun	clock-names = "adc", "dac", "pclk";
34*4882a593Smuzhiyun	pinctrl-names = "default";
35*4882a593Smuzhiyun	pinctrl-0 = <&acodec_pins>;
36*4882a593Smuzhiyun	resets = <&cru SRST_ACDCDIG>;
37*4882a593Smuzhiyun	reset-names = "reset" ;
38*4882a593Smuzhiyun	rockchip,grf = <&grf>;
39*4882a593Smuzhiyun	status = "disabled";
40*4882a593Smuzhiyun};
41