xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)

* Rockchip I2S/TDM controller

Required properties:

- compatible: should be one of the following
   - "rockchip,px30-i2s-tdm": for px30
   - "rockchip,rk1808-i2s-tdm": for rk1808
   - "rockchip,rk3308-i2s-tdm": for rk3308
   - "rockchip,rk3568-i2s-tdm": for rk3568
   - "rockchip,rk3588-i2s-tdm": for rk3588
   - "rockchip,rv1106-i2s-tdm": for rv1106
   - "rockchip,rv1126-i2s-tdm": for rv1126
- reg: physical base address of the controller and length of memory mapped
  region.
- interrupts: should contain the I2S interrupt.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
	Documentation/devicetree/bindings/dma/dma.txt
- dma-names: should include "tx" and "rx".
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
- clock-names: clock names.
- rockchip,bclk-fs: configure the bclk fs.
- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
- reset-names: reset names, should include "tx-m", "rx-m".
- rockchip,cru: cru phandle.
- rockchip,grf: the phandle of the syscon node for GRF register.
- rockchip,mclk-calibrate: enable mclk source calibration.
- rockchip,clk-trcm: tx and rx lrck/bclk common use.
   - 0: both tx_lrck/bclk and rx_lrck/bclk are used
   - 1: only tx_lrck/bclk is used
   - 2: only rx_lrck/bclk is used
- rockchip,no-dmaengine: This is a boolean property. If present, driver will do not
  register pcm dmaengine, only just register dai. if the dai is part of multi-dais,
  the property should be present. Please refer to rockchip,multidais.txt about
  multi-dais usage.
- rockchip,playback-only: Specify that the controller only has playback capability.
- rockchip,capture-only: Specify that the controller only has capture capability.

Optional properties:
- rockchip,i2s-rx-route: This is a variable length array, that shows the mapping
  route of i2s rx sdis to I2S data bus. By default, they are one-to-one mapping:
  * sdi_0 <-- data_0
  * sdi_1 <-- data_1
  * sdi_2 <-- data_2
  * sdi_3 <-- data_3
  If you would like to change the order of I2S RX data, the route mapping may
  like this:
  * sdi_3 <-- data_0
  * sdi_1 <-- data_1
  * sdi_2 <-- data_2
  * sdi_0 <-- data_3
  You need to add the property for i2s node on dts:
  - rockchip,i2s-rx-route = <3 1 2 0>;

- rockchip,i2s-tx-route: This is a variable length array, that shows the mapping
  route of i2s tx sdos to I2S data bus. By default, they are one-to-one mapping:
  * sdo_0 --> data_0
  * sdo_1 --> data_1
  * sdo_2 --> data_2
  * sdo_3 --> data_3
  If you would like to change the order of I2S TX data, the route mapping may
  like this:
  * sdo_2 --> data_0
  * sdo_1 --> data_1
  * sdo_0 --> data_2
  * sdo_3 --> data_3
  You need to add the property for i2s node on dts:
  - rockchip,i2s-tx-route = <2 1 0 3>;

- rockchip,tdm-fsync-half-frame: This is a boolean value, if present, use half
  frame fsync.

Example for rk3308 I2S/TDM controller:

i2s_8ch_0: i2s@ff300000 {
	compatible = "rockchip,rk3308-i2s-tdm";
	reg = <0x0 0xff300000 0x0 0x1000>;
	interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
	clock-names = "mclk_tx", "mclk_rx", "hclk";
	dmas = <&dmac1 0>, <&dmac1 1>;
	dma-names = "tx", "rx";
	resets = <&cru SRST_I2S0_8CH_TX_M>, <&cru SRST_I2S0_8CH_RX_M>;
	reset-names = "tx-m", "rx-m";
	rockchip,cru = <&cru>;
	rockchip,clk-trcm = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2s_8ch_0_sclktx
		     &i2s_8ch_0_sclkrx
		     &i2s_8ch_0_lrcktx
		     &i2s_8ch_0_lrckrx
		     &i2s_8ch_0_sdi0
		     &i2s_8ch_0_sdi1
		     &i2s_8ch_0_sdi2
		     &i2s_8ch_0_sdi3
		     &i2s_8ch_0_sdo0
		     &i2s_8ch_0_sdo1
		     &i2s_8ch_0_sdo2
		     &i2s_8ch_0_sdo3
		     &i2s_8ch_0_mclk>;
	status = "disabled";
};