1* Rockchip I2S/TDM controller 2 3Required properties: 4 5- compatible: should be one of the following 6 - "rockchip,px30-i2s-tdm": for px30 7 - "rockchip,rk1808-i2s-tdm": for rk1808 8 - "rockchip,rk3308-i2s-tdm": for rk3308 9 - "rockchip,rk3568-i2s-tdm": for rk3568 10 - "rockchip,rk3588-i2s-tdm": for rk3588 11 - "rockchip,rv1106-i2s-tdm": for rv1106 12 - "rockchip,rv1126-i2s-tdm": for rv1126 13- reg: physical base address of the controller and length of memory mapped 14 region. 15- interrupts: should contain the I2S interrupt. 16- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 17 Documentation/devicetree/bindings/dma/dma.txt 18- dma-names: should include "tx" and "rx". 19- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. 20- clock-names: clock names. 21- rockchip,bclk-fs: configure the bclk fs. 22- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names. 23- reset-names: reset names, should include "tx-m", "rx-m". 24- rockchip,cru: cru phandle. 25- rockchip,grf: the phandle of the syscon node for GRF register. 26- rockchip,mclk-calibrate: enable mclk source calibration. 27- rockchip,clk-trcm: tx and rx lrck/bclk common use. 28 - 0: both tx_lrck/bclk and rx_lrck/bclk are used 29 - 1: only tx_lrck/bclk is used 30 - 2: only rx_lrck/bclk is used 31- rockchip,no-dmaengine: This is a boolean property. If present, driver will do not 32 register pcm dmaengine, only just register dai. if the dai is part of multi-dais, 33 the property should be present. Please refer to rockchip,multidais.txt about 34 multi-dais usage. 35- rockchip,playback-only: Specify that the controller only has playback capability. 36- rockchip,capture-only: Specify that the controller only has capture capability. 37 38Optional properties: 39- rockchip,i2s-rx-route: This is a variable length array, that shows the mapping 40 route of i2s rx sdis to I2S data bus. By default, they are one-to-one mapping: 41 * sdi_0 <-- data_0 42 * sdi_1 <-- data_1 43 * sdi_2 <-- data_2 44 * sdi_3 <-- data_3 45 If you would like to change the order of I2S RX data, the route mapping may 46 like this: 47 * sdi_3 <-- data_0 48 * sdi_1 <-- data_1 49 * sdi_2 <-- data_2 50 * sdi_0 <-- data_3 51 You need to add the property for i2s node on dts: 52 - rockchip,i2s-rx-route = <3 1 2 0>; 53 54- rockchip,i2s-tx-route: This is a variable length array, that shows the mapping 55 route of i2s tx sdos to I2S data bus. By default, they are one-to-one mapping: 56 * sdo_0 --> data_0 57 * sdo_1 --> data_1 58 * sdo_2 --> data_2 59 * sdo_3 --> data_3 60 If you would like to change the order of I2S TX data, the route mapping may 61 like this: 62 * sdo_2 --> data_0 63 * sdo_1 --> data_1 64 * sdo_0 --> data_2 65 * sdo_3 --> data_3 66 You need to add the property for i2s node on dts: 67 - rockchip,i2s-tx-route = <2 1 0 3>; 68 69- rockchip,tdm-fsync-half-frame: This is a boolean value, if present, use half 70 frame fsync. 71 72Example for rk3308 I2S/TDM controller: 73 74i2s_8ch_0: i2s@ff300000 { 75 compatible = "rockchip,rk3308-i2s-tdm"; 76 reg = <0x0 0xff300000 0x0 0x1000>; 77 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 78 clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; 79 clock-names = "mclk_tx", "mclk_rx", "hclk"; 80 dmas = <&dmac1 0>, <&dmac1 1>; 81 dma-names = "tx", "rx"; 82 resets = <&cru SRST_I2S0_8CH_TX_M>, <&cru SRST_I2S0_8CH_RX_M>; 83 reset-names = "tx-m", "rx-m"; 84 rockchip,cru = <&cru>; 85 rockchip,clk-trcm = <1>; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&i2s_8ch_0_sclktx 88 &i2s_8ch_0_sclkrx 89 &i2s_8ch_0_lrcktx 90 &i2s_8ch_0_lrckrx 91 &i2s_8ch_0_sdi0 92 &i2s_8ch_0_sdi1 93 &i2s_8ch_0_sdi2 94 &i2s_8ch_0_sdi3 95 &i2s_8ch_0_sdo0 96 &i2s_8ch_0_sdo1 97 &i2s_8ch_0_sdo2 98 &i2s_8ch_0_sdo3 99 &i2s_8ch_0_mclk>; 100 status = "disabled"; 101}; 102