1*4882a593Smuzhiyun* Rockchip Audio PWM controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun- compatible: "rockchip,audio-pwm-v1" 6*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 7*4882a593Smuzhiyun region. 8*4882a593Smuzhiyun- dmas: DMA specifiers for tx dma. See the DMA client binding, 9*4882a593Smuzhiyun Documentation/devicetree/bindings/dma/dma.txt 10*4882a593Smuzhiyun- dma-names: should include "tx". 11*4882a593Smuzhiyun- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. 12*4882a593Smuzhiyun- clock-names: should contain following: 13*4882a593Smuzhiyun - "clk" : clock for Audio PWM controller 14*4882a593Smuzhiyun - "hclk": clock for AHB BUS 15*4882a593Smuzhiyun- pinctrl-names: Must contain a "default" entry. 16*4882a593Smuzhiyun- pinctrl-N: One property must exist for each entry in 17*4882a593Smuzhiyun pinctrl-names. See ../pinctrl/pinctrl-bindings.txt 18*4882a593Smuzhiyun for details of the property values. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunOptional properties: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun- rockchip,sample-width-bits: Output sampling data width,the value ranges from 8 to 11 bits. 23*4882a593Smuzhiyun- rockchip,interpolat-points-cfg: Interpolation rate,the value must be 1/3/7/15 points, 24*4882a593Smuzhiyun if this is set,the linear interpolation mode will be turned on. 25*4882a593Smuzhiyun- spk-ctl-gpios: The gpio of speak controller. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunExample for Audio PWM controller: 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunaudpwm: audpwm@ff840000 { 30*4882a593Smuzhiyun compatible = "rockchip,audio-pwm-v1"; 31*4882a593Smuzhiyun reg = <0xff840000 0x1000>; 32*4882a593Smuzhiyun clocks = <&cru SCLK_AUDPWM>, <&cru HCLK_AUDPWM>; 33*4882a593Smuzhiyun clock-names = "clk", "hclk"; 34*4882a593Smuzhiyun dmas = <&dmac 26>; 35*4882a593Smuzhiyun dma-names = "tx"; 36*4882a593Smuzhiyun pinctrl-names = "default"; 37*4882a593Smuzhiyun pinctrl-0 = <&audpwmm0_pins>; 38*4882a593Smuzhiyun rockchip,sample-width-bits = <11>; 39*4882a593Smuzhiyun rockchip,interpolat-points = <1>; 40*4882a593Smuzhiyun spk-ctl-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun status = "disabled"; 42*4882a593Smuzhiyun}; 43