1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm Technologies Inc. LPASS CPU dai driver bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11*4882a593Smuzhiyun - Rohit kumar <rohitkr@codeaurora.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist 15*4882a593Smuzhiyun of MI2S interface for audio data transfer on external codecs. LPASS cpu driver 16*4882a593Smuzhiyun is a module to configure Low-Power Audio Interface(LPAIF) core registers 17*4882a593Smuzhiyun across different IP versions. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun compatible: 21*4882a593Smuzhiyun enum: 22*4882a593Smuzhiyun - qcom,lpass-cpu 23*4882a593Smuzhiyun - qcom,apq8016-lpass-cpu 24*4882a593Smuzhiyun - qcom,sc7180-lpass-cpu 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun maxItems: 2 28*4882a593Smuzhiyun description: LPAIF core registers 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun reg-names: 31*4882a593Smuzhiyun maxItems: 2 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun clocks: 34*4882a593Smuzhiyun minItems: 3 35*4882a593Smuzhiyun maxItems: 6 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun clock-names: 38*4882a593Smuzhiyun minItems: 3 39*4882a593Smuzhiyun maxItems: 6 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun interrupts: 42*4882a593Smuzhiyun maxItems: 2 43*4882a593Smuzhiyun description: LPAIF DMA buffer interrupt 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun interrupt-names: 46*4882a593Smuzhiyun maxItems: 2 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun qcom,adsp: 49*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 50*4882a593Smuzhiyun description: Phandle for the audio DSP node 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun iommus: 53*4882a593Smuzhiyun maxItems: 2 54*4882a593Smuzhiyun description: Phandle to apps_smmu node with sid mask 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun power-domains: 57*4882a593Smuzhiyun maxItems: 1 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun '#sound-dai-cells': 60*4882a593Smuzhiyun const: 1 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun '#address-cells': 63*4882a593Smuzhiyun const: 1 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun '#size-cells': 66*4882a593Smuzhiyun const: 0 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunpatternProperties: 69*4882a593Smuzhiyun "^dai-link@[0-9a-f]$": 70*4882a593Smuzhiyun type: object 71*4882a593Smuzhiyun description: | 72*4882a593Smuzhiyun LPASS CPU dai node for each I2S device. Bindings of each node 73*4882a593Smuzhiyun depends on the specific driver providing the functionality and 74*4882a593Smuzhiyun properties. 75*4882a593Smuzhiyun properties: 76*4882a593Smuzhiyun reg: 77*4882a593Smuzhiyun maxItems: 1 78*4882a593Smuzhiyun description: Must be one of the DAI ID 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun qcom,playback-sd-lines: 81*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 82*4882a593Smuzhiyun description: list of MI2S data lines for playback 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun qcom,capture-sd-lines: 85*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32-array 86*4882a593Smuzhiyun description: list of MI2S data lines for capture 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun required: 89*4882a593Smuzhiyun - reg 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun additionalProperties: false 92*4882a593Smuzhiyun 93*4882a593Smuzhiyunrequired: 94*4882a593Smuzhiyun - compatible 95*4882a593Smuzhiyun - reg 96*4882a593Smuzhiyun - reg-names 97*4882a593Smuzhiyun - clocks 98*4882a593Smuzhiyun - clock-names 99*4882a593Smuzhiyun - interrupts 100*4882a593Smuzhiyun - interrupt-names 101*4882a593Smuzhiyun - '#sound-dai-cells' 102*4882a593Smuzhiyun 103*4882a593SmuzhiyunadditionalProperties: false 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunallOf: 106*4882a593Smuzhiyun - if: 107*4882a593Smuzhiyun properties: 108*4882a593Smuzhiyun compatible: 109*4882a593Smuzhiyun contains: 110*4882a593Smuzhiyun const: qcom,lpass-cpu 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun then: 113*4882a593Smuzhiyun properties: 114*4882a593Smuzhiyun clock-names: 115*4882a593Smuzhiyun items: 116*4882a593Smuzhiyun - const: ahbix-clk 117*4882a593Smuzhiyun - const: mi2s-osr-clk 118*4882a593Smuzhiyun - const: mi2s-bit-clk 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun - if: 121*4882a593Smuzhiyun properties: 122*4882a593Smuzhiyun compatible: 123*4882a593Smuzhiyun contains: 124*4882a593Smuzhiyun const: qcom,apq8016-lpass-cpu 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun then: 127*4882a593Smuzhiyun properties: 128*4882a593Smuzhiyun clock-names: 129*4882a593Smuzhiyun items: 130*4882a593Smuzhiyun - const: ahbix-clk 131*4882a593Smuzhiyun - const: mi2s-bit-clk0 132*4882a593Smuzhiyun - const: mi2s-bit-clk1 133*4882a593Smuzhiyun - const: mi2s-bit-clk2 134*4882a593Smuzhiyun - const: mi2s-bit-clk3 135*4882a593Smuzhiyun - const: pcnoc-mport-clk 136*4882a593Smuzhiyun - const: pcnoc-sway-clk 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun - if: 139*4882a593Smuzhiyun properties: 140*4882a593Smuzhiyun compatible: 141*4882a593Smuzhiyun contains: 142*4882a593Smuzhiyun const: qcom,sc7180-lpass-cpu 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun then: 145*4882a593Smuzhiyun properties: 146*4882a593Smuzhiyun clock-names: 147*4882a593Smuzhiyun oneOf: 148*4882a593Smuzhiyun - items: #for I2S 149*4882a593Smuzhiyun - const: pcnoc-sway-clk 150*4882a593Smuzhiyun - const: audio-core 151*4882a593Smuzhiyun - const: mclk0 152*4882a593Smuzhiyun - const: pcnoc-mport-clk 153*4882a593Smuzhiyun - const: mi2s-bit-clk0 154*4882a593Smuzhiyun - const: mi2s-bit-clk1 155*4882a593Smuzhiyun - items: #for HDMI 156*4882a593Smuzhiyun - const: pcnoc-sway-clk 157*4882a593Smuzhiyun - const: audio-core 158*4882a593Smuzhiyun - const: pcnoc-mport-clk 159*4882a593Smuzhiyun reg-names: 160*4882a593Smuzhiyun anyOf: 161*4882a593Smuzhiyun - items: #for I2S 162*4882a593Smuzhiyun - const: lpass-lpaif 163*4882a593Smuzhiyun - items: #for I2S and HDMI 164*4882a593Smuzhiyun - const: lpass-hdmiif 165*4882a593Smuzhiyun - const: lpass-lpaif 166*4882a593Smuzhiyun interrupt-names: 167*4882a593Smuzhiyun anyOf: 168*4882a593Smuzhiyun - items: #for I2S 169*4882a593Smuzhiyun - const: lpass-irq-lpaif 170*4882a593Smuzhiyun - items: #for I2S and HDMI 171*4882a593Smuzhiyun - const: lpass-irq-lpaif 172*4882a593Smuzhiyun - const: lpass-irq-hdmi 173*4882a593Smuzhiyun required: 174*4882a593Smuzhiyun - iommus 175*4882a593Smuzhiyun - power-domains 176*4882a593Smuzhiyun 177*4882a593Smuzhiyunexamples: 178*4882a593Smuzhiyun - | 179*4882a593Smuzhiyun #include <dt-bindings/sound/sc7180-lpass.h> 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun soc { 182*4882a593Smuzhiyun #address-cells = <2>; 183*4882a593Smuzhiyun #size-cells = <2>; 184*4882a593Smuzhiyun lpass@62d80000 { 185*4882a593Smuzhiyun compatible = "qcom,sc7180-lpass-cpu"; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun reg = <0 0x62d87000 0 0x68000>, 188*4882a593Smuzhiyun <0 0x62f00000 0 0x29000>; 189*4882a593Smuzhiyun reg-names = "lpass-hdmiif", 190*4882a593Smuzhiyun "lpass-lpaif"; 191*4882a593Smuzhiyun iommus = <&apps_smmu 0x1020 0>, 192*4882a593Smuzhiyun <&apps_smmu 0x1032 0>; 193*4882a593Smuzhiyun power-domains = <&lpass_hm 0>; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun clocks = <&gcc 131>, 196*4882a593Smuzhiyun <&lpasscorecc 6>, 197*4882a593Smuzhiyun <&lpasscorecc 7>, 198*4882a593Smuzhiyun <&lpasscorecc 10>, 199*4882a593Smuzhiyun <&lpasscorecc 8>, 200*4882a593Smuzhiyun <&lpasscorecc 9>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun clock-names = "pcnoc-sway-clk", "audio-core", 203*4882a593Smuzhiyun "mclk0", "pcnoc-mport-clk", 204*4882a593Smuzhiyun "mi2s-bit-clk0", "mi2s-bit-clk1"; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun interrupts = <0 160 1>, 207*4882a593Smuzhiyun <0 268 1>; 208*4882a593Smuzhiyun interrupt-names = "lpass-irq-lpaif", 209*4882a593Smuzhiyun "lpass-irq-hdmi"; 210*4882a593Smuzhiyun #sound-dai-cells = <1>; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #address-cells = <1>; 213*4882a593Smuzhiyun #size-cells = <0>; 214*4882a593Smuzhiyun /* Optional to set different MI2S SD lines */ 215*4882a593Smuzhiyun dai-link@0 { 216*4882a593Smuzhiyun reg = <MI2S_PRIMARY>; 217*4882a593Smuzhiyun qcom,playback-sd-lines = <1>; 218*4882a593Smuzhiyun qcom,capture-sd-lines = <0>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun... 224