1*4882a593Smuzhiyun* Texas Instruments OMAP4+ McPDM 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "ti,omap4-mcpdm" 5*4882a593Smuzhiyun- reg: Register location and size as an array: 6*4882a593Smuzhiyun <MPU access base address, size>, 7*4882a593Smuzhiyun <L3 interconnect address, size>; 8*4882a593Smuzhiyun- interrupts: Interrupt number for McPDM 9*4882a593Smuzhiyun- ti,hwmods: Name of the hwmod associated to the McPDM 10*4882a593Smuzhiyun- clocks: phandle for the pdmclk provider, likely <&twl6040> 11*4882a593Smuzhiyun- clock-names: Must be "pdmclk" 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunmcpdm: mcpdm@40132000 { 16*4882a593Smuzhiyun compatible = "ti,omap4-mcpdm"; 17*4882a593Smuzhiyun reg = <0x40132000 0x7f>, /* MPU private access */ 18*4882a593Smuzhiyun <0x49032000 0x7f>; /* L3 Interconnect */ 19*4882a593Smuzhiyun interrupts = <0 112 0x4>; 20*4882a593Smuzhiyun interrupt-parent = <&gic>; 21*4882a593Smuzhiyun ti,hwmods = "mcpdm"; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunIn board DTS file the pdmclk needs to be added: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun&mcpdm { 27*4882a593Smuzhiyun clocks = <&twl6040>; 28*4882a593Smuzhiyun clock-names = "pdmclk"; 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun}; 31