1*4882a593Smuzhiyun* Texas Instruments OMAP2+ McBSP module 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: "ti,omap2420-mcbsp" for McBSP on OMAP2420 5*4882a593Smuzhiyun "ti,omap2430-mcbsp" for McBSP on OMAP2430 6*4882a593Smuzhiyun "ti,omap3-mcbsp" for McBSP on OMAP3 7*4882a593Smuzhiyun "ti,omap4-mcbsp" for McBSP on OMAP4 and newer SoC 8*4882a593Smuzhiyun- reg: Register location and size, for OMAP4+ as an array: 9*4882a593Smuzhiyun <MPU access base address, size>, 10*4882a593Smuzhiyun <L3 interconnect address, size>; 11*4882a593Smuzhiyun- reg-names: Array of strings associated with the address space 12*4882a593Smuzhiyun- interrupts: Interrupt numbers for the McBSP port, as an array in case the 13*4882a593Smuzhiyun McBSP IP have more interrupt lines: 14*4882a593Smuzhiyun <OCP compliant irq>, 15*4882a593Smuzhiyun <TX irq>, 16*4882a593Smuzhiyun <RX irq>; 17*4882a593Smuzhiyun- interrupt-names: Array of strings associated with the interrupt numbers 18*4882a593Smuzhiyun- ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC) 19*4882a593Smuzhiyun- ti,hwmods: Name of the hwmod associated to the McBSP port 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunmcbsp2: mcbsp@49022000 { 24*4882a593Smuzhiyun compatible = "ti,omap3-mcbsp"; 25*4882a593Smuzhiyun reg = <0x49022000 0xff>, 26*4882a593Smuzhiyun <0x49028000 0xff>; 27*4882a593Smuzhiyun reg-names = "mpu", "sidetone"; 28*4882a593Smuzhiyun interrupts = <0 17 0x4>, /* OCP compliant interrupt */ 29*4882a593Smuzhiyun <0 62 0x4>, /* TX interrupt */ 30*4882a593Smuzhiyun <0 63 0x4>, /* RX interrupt */ 31*4882a593Smuzhiyun <0 4 0x4>; /* Sidetone */ 32*4882a593Smuzhiyun interrupt-names = "common", "tx", "rx", "sidetone"; 33*4882a593Smuzhiyun interrupt-parent = <&intc>; 34*4882a593Smuzhiyun ti,buffer-size = <1280>; 35*4882a593Smuzhiyun ti,hwmods = "mcbsp2"; 36*4882a593Smuzhiyun}; 37