1*4882a593SmuzhiyunNVIDIA Tegra audio complex, with MAX98090 CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible : "nvidia,tegra-audio-max98090" 5*4882a593Smuzhiyun- clocks : Must contain an entry for each entry in clock-names. 6*4882a593Smuzhiyun See ../clocks/clock-bindings.txt for details. 7*4882a593Smuzhiyun- clock-names : Must include the following entries: 8*4882a593Smuzhiyun - pll_a 9*4882a593Smuzhiyun - pll_a_out0 10*4882a593Smuzhiyun - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) 11*4882a593Smuzhiyun- nvidia,model : The user-visible name of this sound complex. 12*4882a593Smuzhiyun- nvidia,audio-routing : A list of the connections between audio components. 13*4882a593Smuzhiyun Each entry is a pair of strings, the first being the connection's sink, 14*4882a593Smuzhiyun the second being the connection's source. Valid names for sources and 15*4882a593Smuzhiyun sinks are the MAX98090's pins (as documented in its binding), and the jacks 16*4882a593Smuzhiyun on the board: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun * Headphones 19*4882a593Smuzhiyun * Speakers 20*4882a593Smuzhiyun * Mic Jack 21*4882a593Smuzhiyun * Int Mic 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's 24*4882a593Smuzhiyun connected to the CODEC. 25*4882a593Smuzhiyun- nvidia,audio-codec : The phandle of the MAX98090 audio codec. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunOptional properties: 28*4882a593Smuzhiyun- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in 29*4882a593Smuzhiyun- nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExample: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunsound { 34*4882a593Smuzhiyun compatible = "nvidia,tegra-audio-max98090-venice2", 35*4882a593Smuzhiyun "nvidia,tegra-audio-max98090"; 36*4882a593Smuzhiyun nvidia,model = "NVIDIA Tegra Venice2"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun nvidia,audio-routing = 39*4882a593Smuzhiyun "Headphones", "HPR", 40*4882a593Smuzhiyun "Headphones", "HPL", 41*4882a593Smuzhiyun "Speakers", "SPKR", 42*4882a593Smuzhiyun "Speakers", "SPKL", 43*4882a593Smuzhiyun "Mic Jack", "MICBIAS", 44*4882a593Smuzhiyun "IN34", "Mic Jack"; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun nvidia,i2s-controller = <&tegra_i2s1>; 47*4882a593Smuzhiyun nvidia,audio-codec = <&acodec>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun clocks = <&tegra_car TEGRA124_CLK_PLL_A>, 50*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 51*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_EXTERN1>; 52*4882a593Smuzhiyun clock-names = "pll_a", "pll_a_out0", "mclk"; 53*4882a593Smuzhiyun}; 54